ZeroHour

CVE-2026-14296

niche

Improper signature verification in MCUboot Direct XIP on multi-core devices

CVSS 3.1
7.5 high
EPSS
<1%p1
Published
()
Modified
AI analysis

CVE-2026-14296 is an improper verification of a cryptographic signature (CWE-347) in MCUboot, the open-source secure bootloader for embedded devices, when it is used in its bare (upstream) configuration with the Direct XIP update strategy on multi-core systems. When MCUboot selects slots for the main application and a secondary core such as the radio core, it may choose different slots for each image; it boots the main application from its slot and passes that slot's address to the application, which then starts the radio core from that slot without additional verification. As a result, the radio core can be started from a slot whose image has not been authenticated, potentially allowing unverified or mismatched firmware to run on that core; the CVSS 3.1 score of 7.5 (AV:A/AC:H) indicates an attacker with adjacent access could exploit this, though the high attack complexity makes practical exploitation difficult. Affected products are deployments of upstream MCUboot using Direct XIP on devices with secondary cores; specific versions are not provided in the available data. No public proof-of-concept or known exploitation exists; EPSS is 0.1% and the issue is not in CISA KEV.

What to do: If your firmware uses upstream MCUboot with the Direct XIP update strategy on a multi-core SoC, audit whether the main application starts secondary cores from a slot address supplied at boot without verifying that slot's image, and add verification (or image-pairing checks) before starting the radio core, or consider a different update strategy. Apply the official fix from the MCUboot project or your SDK vendor as soon as a patched release is identified, since the available data lists no fixed version. Monitor the MCUboot project and NVD for updated advisories and patch information.

Affected
MCUboot project (upstream) MCUboot (bare/upstream configuration using the Direct XIP update strategy)
Estimated exposure
nichelikely hundreds to low thousands of embedded devices (a narrow configuration subset of MCUboot deployments; exact counts unknown) — The flaw requires the bare upstream MCUboot configuration with the Direct XIP strategy on multi-core SoCs, which is a small slice of the otherwise very large MCUboot/Zephyr embedded ecosystem and for which no public install or scan counts…

Order-of-magnitude estimate by the model from install counts, market share and public scan data it knows; verify before quoting.

Description

When using the Direct XIP update strategy, the main application image starts other cores (i.e. radio core), based on the currently active slot without additional verification. The MCUboot in the bare (upstream) configuration assumes that if there is at least a single slot for each image available, the system is bootable and continues the boot process. This may lead to a situation when MCUboot picks different slot for different images (i.e. (a) for the main application and (b) for the radio image), boots the main application (from slot (a)) that afterwards starts the radio image by providing an address of the unauthenticated slot ((a) instead of (b)).

Weakness
CWE-347
Vector
CVSS:3.1/AV:A/AC:H/PR:N/UI:N/S:U/C:H/I:H/A:H

In the news

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