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3 stories in the last 30d

Inside NVIDIA’s cuDNN Graph API: Fusion, Autotuning, and Plan Reuse with cuDNN Frontend

MarkTechPost tutorial walks through NVIDIA's cuDNN Frontend graph API, covering kernel fusion, autotuning, plan reuse, and CUDA graph capture on Colab GPUs.

The tutorial explains how to express GPU computations as operation graphs via the cuDNN Frontend graph API, running the five-step build pipeline of validate, build operation graph, create execution plans, check support, and build plans. It progresses from a single fused convolution with bias and ReLU to autotuning across engine configs, FP8-style epilogues, attention, plan serialization, dynamic shapes, and CUDA graph capture. Each kernel is benchmarked against a PyTorch reference on a single Colab GPU to verify correctness and measure cost. The piece also covers practical setup issues like making libcudnn.so visible to the frontend's dynamic loader.

MarkTechPost · 1d agoAI tools & infra2

NVIDIA Announces CUDA Rust with cuda-oxide (SIMT) and cutile-rs (Tile) for Compile-Time-Safe GPU Kernels

NVIDIA launches CUDA Rust via open-source cuda-oxide (SIMT) and cutile-rs (Tile), bringing compile-time-safe Rust GPU kernels.

NVIDIA announced CUDA Rust, making Rust a first-class language for GPU kernels through two NVlabs open-source projects: cuda-oxide for the SIMT model and cutile-rs for the Tile model. Both use Rust's ownership and borrow checker to catch buffer aliasing bugs at compile time. cutile-rs is published on crates.io, runs on stable Rust 1.89+ with CUDA 13.3, and is already used in Hugging Face's Grout inference engine and mistral.rs; cuda-oxide is early alpha requiring nightly Rust, CUDA 12.x, and compute capability 8.0+. cuda-oxide compiles Rust MIR through the community Pliron IR framework and LLVM to PTX, while cutile-rs JIT-compiles kernels via CUDA Tile IR.

MarkTechPost · 8d agoAI tools & infra2

Speculative Decoding in vLLM on AMD GPUs

vLLM benchmarks speculative decoding on AMD Instinct MI300X and MI355X GPUs across five drafting methods including EAGLE-3 and native MTP.

The vLLM project documents draft-and-verify speculative decoding support for AMD GPUs via ROCm, comparing native MTP, Gemma 4 MTP, EAGLE-3, DFlash, and DSpark drafting approaches. Output-token throughput effects varied with drafting method, proposal length, model family, draft checkpoint, workload, and acceptance behavior. The post also covers how to enable each method plus practical tuning and observability considerations.