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No Bit Left Behind: Using Brute-Force Lifting to Achieve Fully Static Binary Recompilation
Prototype binary lifter brute-force lifts every byte offset of x86-64 binaries to LLVM IR, enabling fully static cross-ISA recompilation without runtime support.
The paper presents a fully static, whole-program binary lifting system that treats every byte offset as a potential branch target, constructing a superset control flow graph that conservatively contains all feasible control flows. Statically unresolvable computed branches are reduced to lookups in a dispatch table pointing to translated control flow paths, eliminating runtime translation machinery on the target machine. A prototype recompiles x86-64 binaries to LLVM IR with no code/data heuristics and achieves fully static cross-compilation to AArch64 using unmodified LLVM backends.
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OpenSSL 4.1.0 Alpha1 Released With DTLS 1.3 and Faster Post-Quantum Cryptography
OpenSSL 4.1.0 Alpha1 adds DTLS 1.3 support, ML-DSA and ML-KEM post-quantum optimizations, and GREASE TLS compatibility, intended for testing only.
The alpha preview of OpenSSL 4.1.0 implements RFC 9147 DTLS 1.3 for UDP-based applications and integrates DTLS into the SSL listener API. It accelerates ML-DSA signatures and ML-KEM encapsulation with AVX-512 and VAES optimizations on x86_64, and adds GREASE (RFC 8701), IKEv2 KDF support, and Elbrus2000 (e2k) targets. The release is intended for testing and development, not production, and removes Windows-on-Itanium and Windows CE build targets.
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OpenSSL’s new alpha build speeds up post-quantum crypto
OpenSSL 4.1.0 alpha1 adds DTLS 1.3 support and speeds up ML-DSA and ML-KEM post-quantum operations across several architectures.
The OpenSSL project released the first alpha of OpenSSL 4.1.0, months before general availability. The build adds DTLS 1.3 (RFC 9147) to secure UDP-based traffic such as VPNs, video calls and IoT, and includes optimized ML-DSA and ML-KEM operations for ppc64le, s390x and x86_64 plus AVX-512 acceleration for SHAKE hashing and AES-CBC decryption. Breaking changes include a new Net::Curl::Easy dependency for tsget, dropped Windows-on-Itanium and Windows CE support, and replacement of the no-ecdsa/no-ecdh Configure options with no-ec. It also adds GREASE support (RFC 8701), a DTLS mode for the SSL listener API, IKEv2 KDF support, and initial Elbrus2000 processor architecture support.
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You Shall Not Pass into Ring-0! A User Privacy-Friendly Anti-Cheat Architecture for Personal Computers
Tirith replaces invasive kernel-level game anti-cheats with protected VMs and a dual-trusted virtualization monitor, preserving detection and near-native performance.
Researchers present Tirith, an anti-cheat architecture that runs video games in Protected Virtual Machines, sandboxing computations from untrusted root admins, and uses a virtualization monitor trusted by both players and developers to watch for malicious drivers. This removes the need for privacy-invasive ring-0 kernel anti-cheat components while matching their protection against a wide range of cheating mechanisms. To overcome VM stack limitations, the work contributes a security-focused Library OS kernel for games and an efficient graphics sharing pipeline for near-native rendering performance.
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Scaling Verification of Cryptographic Software with Aeneas, Rust, and Lean
Microsoft SymCrypt implementations of SHA-3 and ML-KEM verified in Lean via Aeneas-extracted Rust models, with AI agents writing proofs.
The paper develops a methodology for verifying production Rust cryptographic code by using Aeneas to extract pure models into Lean, avoiding low-level pointer and aliasing reasoning. Applied to Microsoft's SymCrypt, it verifies SHA-3 and ML-KEM implementations ported from C to Rust and extends SymCrypt with FrodoKEM, ML-DSA, and HPKE. A 237 KLOC Lean development establishes safety, panic-freedom, and functional correctness of 16.7 KLOC of Rust supporting post-quantum cipher suites on x86-64 and ARM. AI agents autonomously write formal proofs verified by the Lean kernel, and evaluation shows verified Rust meets SymCrypt's performance and portability requirements.
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d-Matrix Adopts NVIDIA NVLink Fusion for Rack-Scale XPU Deployment
d-Matrix will integrate its Raptor inference XPUs with NVIDIA NVLink Fusion, MGX racks and Spectrum-X networking for rack-scale AI factory deployment.
Inference chipmaker d-Matrix announced adoption of NVIDIA NVLink Fusion to connect its next-generation Raptor XPUs to NVIDIA's scale-up and scale-out networking, MGX rack architecture, and broader AI factory platform. NVIDIA claims 3x lower XPU-to-XPU latency than off-the-shelf Ethernet and 3 TB/s per-XPU all-to-all bandwidth via sixth-generation NVLink. d-Matrix plans to integrate Vera CPUs, ConnectX-9 SuperNICs, BlueField-4 DPUs and Spectrum-X Ethernet, with racks able to work alongside Vera Rubin NVL72 GPU systems. Other NVLink Fusion partners include AWS, Arm, Intel, Fujitsu, Marvell, MediaTek, Samsung and Cadence.
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