Framework turns power-electronics specs into verified KiCad schematics
Original title: From Natural Language to Real Schematics: An Automated Workflow for Power Electronics Schematic Synthesis
Authors report verification coverage rising from 22.2 to 98.6 and SPICE pass rate from 0 to 100 versus a vanilla LLM.
The paper proposes a bounded dual-loop workflow that converts natural-language converter specifications into verified, editable KiCad schematics and manufacturing deliverables. Stages cover requirement parsing, topology synthesis, part selection grounded in distributor APIs and OEM datasheets, ngspice transient checks, and KiCad netlist round-trip verification. Case studies cover a 24-36V to 12V, 2A buck and an isolated 48V to 24V, 0.5A dual-active bridge. Against a vanilla LLM, the authors report large gains in verification coverage, value consistency, and simulation pass rate.
Unconfirmed: Coverage and pass-rate figures are author-reported comparisons against a vanilla LLM baseline.
- Named topologies include buck, boost, flyback, DAB, and half-bridge LLC.
- The buck case has 29 positions and 83 verified terminals.
- The DAB case has 87 positions and 341 verified terminals.
- Nominal value consistency is reported rising from 0 to 97.7.
From the original article
1 min read at arxiv.orgDesigning power electronics converters traditionally requires intensive human expertise across topology sizing, commercial component selection, circuit simulation verification, and schematic drafting.
By Bowen Su · arxiv.org
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