Search: “custom-hardware”

New DDRop Attack Breaks Intel TDX and AMD SEV-SNP With $159 DDR5 Device

DDRop uses a $159 DDR5 RDIMM interposer to silently drop memory writes and break Intel TDX and AMD SEV-SNP confidential VMs.

Researchers published DDRop, a physical attack built from about $159 in parts that uses a custom DDR5 RDIMM interposer to inject parity errors and silently discard selected cache-line writebacks. Intel TDX, Intel Scalable SGX, and AMD SEV-SNP are affected because they lack per-line cryptographic freshness, so processors can accept stale encrypted data as valid state. The team demonstrated deterministic plaintext copying between pages, malicious Secure EPT entry injection, forcing trust domains into debug mode, and forging attestation measurements. The attack requires privileged host control plus brief physical access, and researchers say no simple software patch exists.

Cyber Security News·Sep 15, 09:57 UTC · 23h agoResearch 2 sources

Inside Meta’s Infrastructure Lab

Meta offers a tour of its Infrastructure Lab, showcasing custom hardware being developed to power next-generation AI systems.

Meta Newsroom published a post in which Tom Shaw gives an inside look at Meta's Infrastructure Lab and the hardware the company is developing to support its next generation of AI workloads. The piece is a corporate showcase of custom infrastructure efforts rather than a product launch, benchmark result, or security event.

Meta Newsroom·Sep 1, 20:24 UTC · 14d agoAI industry

How CHERIoT Provides Strong and Usable Isolation Without an MMU

ACM Queue paper explains how CHERIoT uses CHERI hardware capabilities to give microcontroller-class IoT devices memory and privilege isolation without an MMU.

The ACM Queue article (DOI 10.1145/3831361) describes CHERIoT, a RISC-V-derived platform that scales CHERI capability-based hardware down to small embedded and IoT microcontrollers. It provides strong, fine-grained isolation and memory safety without a memory management unit, aiming to make compartmentalization practical for low-cost devices. The piece emphasizes usability of the isolation model alongside its security guarantees.

Lobsters · security·Sep 10, 14:59 UTC · 5d agoResearch

Anthropic's new hardware standard lets AI agents control the physical world

Anthropic announced a standardized hardware driver interface letting AI agents control physical devices and for devices to interoperate.

Anthropic introduced a new hardware standard that provides a standardized driver interface for AI agents to control the physical world. The standard aims to let devices communicate with AI systems and with each other. Details on adoption, partners, or specifications were not included in the available text.

Ars Technica · AI·Aug 27, 22:15 UTC · 19d agoAI industry1

New hardware device can RAM into encrypted memory, expose your data

Researchers built a $200 DDR5 interposer that silently drops memory writes to break TDX, SGX, and SEV-SNP confidential VM integrity, requiring physical access.

Researchers from KU Leuven, ETH Zurich, Durham University, and Google demonstrated DDRop, a hardware interposer costing under $200 that corrupts DDR5 bus commands to silently drop writes to encrypted memory, enabling replay attacks on confidential VMs. Because scalable memory encryption lacks freshness checks, protected VMs keep computing on stale attacker-selected data; on an Intel TDX server the attack forces debug mode for plaintext memory reads or forges attestation reports, succeeding in under two minutes without crashing. Intel and AMD both called the attack out of scope for their cloud threat models, with no mitigation planned, and proposed cache line versioning appears still vulnerable. The full interposer design is being released as open-source hardware.

The Register · Security·Sep 14, 18:31 UTC · 1d agoResearch

How XPUs Meet a World-Class AI Factory

NVIDIA argues AI factories with custom XPUs and NVLink Fusion connectivity must optimize tokens-per-second, tokens-per-watt, cost and uptime.

NVIDIA published a blog explaining that AI factories running continuously are economically defined by delivered output: tokens per second, tokens per watt, cost per token, utilization and uptime. It argues hyperscalers and AI-native companies building custom XPUs need infrastructure designed as a complete factory rather than collections of individual accelerators. The piece promotes NVIDIA's NVLink Fusion and full-stack XPU connectivity as the foundation for such world-class AI factory builds.

NVIDIA Blog·Aug 24, 15:00 UTC · 22d agoAI industry

US Customs supervisor busted for stealing hardware from Homeland Security PCs

FBI arrested CBP supervisor Terry Liu for swapping CPUs, RAM and drives in 46 DHS computers and trading stolen parts via Newegg.

The FBI arrested and charged CBP supervisor Terry "Jiajia" Liu of Calais, Maine, with theft of government property after hidden cameras captured hardware swaps on midnight shifts. Investigators found 39 processors replaced, six memory modules swapped, and eight hard drives changed across 46 DHS computers at three Maine border facilities, with original Intel 14th-gen Raptor Lake Refresh chips downgraded to older, sometimes Pentium-class parts. Liu traded in the stolen Core i7 chips 16 times via Newegg's trade-in program over 14 months for roughly $200-210 each. Restoring the stolen hardware is estimated at $20,460, with full replacement around $105,800.

Hacker News · security·Sep 13, 13:24 UTC · 2d agoPolicy & legalHN 22↑ · 12 comments2· 1 read

Speculative Decoding in vLLM on AMD GPUs

vLLM benchmarks speculative decoding on AMD Instinct MI300X and MI355X GPUs across five drafting methods including EAGLE-3 and native MTP.

The vLLM project documents draft-and-verify speculative decoding support for AMD GPUs via ROCm, comparing native MTP, Gemma 4 MTP, EAGLE-3, DFlash, and DSpark drafting approaches. Output-token throughput effects varied with drafting method, proposal length, model family, draft checkpoint, workload, and acceptance behavior. The post also covers how to enable each method plus practical tuning and observability considerations.

Hacker News · AI·Sep 7, 09:26 UTC · 8d agoAI tools & infraHN 141↑ · 52 comments1

FreqSpaNet: Frequency and Spatial Learning of SFPF for Physical Layer Hardware Integrity Detection

FreqSpaNet learns spatio-frequency polarization fingerprints to detect unauthorized wireless hardware replacement, reaching 96.31% mean AUROC across seven replacement scenarios.

FreqSpaNet is a representation learning network for open-set hardware anomaly detection using spatio-frequency polarization fingerprints (SFPFs), which capture device-dependent responses across frequencies and directions. A frequency branch models local variations among neighboring frequencies while a geometry-aware spatial branch models directional relationships via angular information, combined through adaptive fusion and complementary pretraining. It achieves a mean AUROC of 96.31%, 9.05 points above the baseline, and is verified under seven hardware replacement scenarios.

arXiv cs.AI / cs.LG / cs.CL·Sep 15, 17:32 UTC · 15h agoAI research

[hardware] Fullhan FH8626V100 - Multiple Vulnerabilities

Multiple vulnerabilities in the Fullhan FH8626V100 hardware chip have been disclosed alongside public proof-of-concept exploits.

Exploit-DB lists an entry covering multiple vulnerabilities in the Fullhan FH8626V100, a hardware component. The listing provides no CVE ids, vulnerability classes, or evidence of in-the-wild exploitation. Impact is likely limited to devices embedding the affected chip.

Exploit-DB·Sep 2, 00:00 UTC · 14d agoExploit / PoC

CertiFlash: A Formal Verification Framework for Flash Translation Layers in Computational Solid State Drives

CertiFlash provides machine-checked formal verification of SSD flash translation layers, proving isolation, integrity, and ownership invariants to prevent tenant data leaks.

CertiFlash is an open-source formal verification framework for Flash Translation Layers (FTL) in computational SSDs, mechanized in the Rocq proof assistant. It shows that a faulty FTL can corrupt device state at five surfaces (e.g., leaking data between tenants or dropping integrity tags), demonstrated on a DaisyPlus OpenSSD. Designers prove once that every operation of a general FTL model preserves a global invariant covering mapping, isolation, integrity, ownership, and allocation; new designs need only discharge five hypotheses. Across four case studies, added effort was 27-3,231 lines against a 16,489-line framework.

arXiv cs.CR·Sep 9, 15:44 UTC · 6d agoResearch1

Securing the Infrastructure of Intelligence

NVIDIA positions AI factories combining chips, networking, power and data as the defining infrastructure of the AI economy needing full-stack security.

NVIDIA's blog argues that AI factories are the defining infrastructure of the AI era, transforming energy and data into intelligence that powers businesses and countries. It frames compute as revenue and lists the full stack of critical resources required: advanced chips, packaging, memory, networking, land and power. The piece is a corporate positioning article about securing this infrastructure, with no specific incident or product announcement detailed in the excerpt.

NVIDIA Blog·Aug 17, 12:34 UTC · 29d agoAI industry

USN-8727-1: Linux kernel (OEM) vulnerabilities

Ubuntu issued kernel security update USN-8727-1 for OEM kernels, fixing an Arm TLB invalidation flaw (CVE-2025-10263) allowing local privilege escalation.

Ubuntu released USN-8727-1, a security update for the OEM variant of the Linux kernel. It fixes CVE-2025-10263, in which certain Arm processors complete broadcast TLB invalidation before related memory writes are globally observed, potentially letting local attackers bypass memory protections or escalate privileges. The notice also corrects additional kernel flaws across ARM64, ARM32, RISC-V, S390 and other subsystems.

Ubuntu Security Notices·updated Sep 7, 09:12 UTC · 8d ago·first Sep 7, 09:02 UTC · 9d agoAdvisory 6 sourcesCVE-2025-10263

Greatness PhaaS Adds Device Code Phishing to Bypass MFA and Steal Tokens

The Hacker News·Aug 5, 08:52 UTC · Aug 5, 2026Phishing & fraud1

UAT-10147 deploys SPECTRE: A cross-platform implant with Linux rootkit and BYOVD capabilities

Cisco Talos identifies UAT-10147 deploying the SPECTRE implant with cross-platform C2, credential theft, and kernel-level EDR bypass.

Cisco Talos reports that the tracked threat actor UAT-10147 is deploying a newly identified implant named SPECTRE. SPECTRE supports cross-platform command-and-control, process injection, credential theft, and anti-analysis protections. It also includes a Linux rootkit and BYOVD (bring your own vulnerable driver) capability enabling kernel-level EDR bypass, marking an evolution in commodity intrusion tooling.

Cisco Talos·Aug 20, 10:00 UTC · 26d agoThreat actor in the wild

NVIDIA NVLink Fusion Expands With NVHBM Custom High-Bandwidth Memory

NVIDIA expands NVLink Fusion with NVHBM custom high-bandwidth memory for hyperscalers building trillion-parameter and agentic AI infrastructure.

NVIDIA announced that NVLink Fusion will expand to support NVHBM, a custom high-bandwidth memory option. The offering targets hyperscalers and AI innovators building next-generation systems where agentic AI and trillion-parameter workloads are mainstream. NVIDIA frames the announcement around co-designing compute, memory, storage, networking, and software as a unified system.

NVIDIA Blog·Aug 26, 21:05 UTC · 20d agoAI industry

"They don't care about this": A Systematic Study of TEE Build Reproducibility in the Wild

91% of 115 surveyed TEE deployments across Intel SGX, TDX, and AMD SEV fail to provide reproducible builds needed for verifiable remote attestation.

A systematic study of 115 TEE deployments found 91% were not reproducible and 80% lacked both source code and a reference build, undermining remote attestation guarantees. Interviews with 12 developers of 50 Intel SGX projects confirmed that only one participant treats reproducibility as a development priority. The authors identify technical barriers such as embedded timestamps plus ecosystem-level issues like lack of build-environment control in multi-stakeholder projects, and call for holistic, committed reproducibility practices.

arXiv cs.CR·Sep 10, 11:43 UTC · 5d agoResearch

The Regulators Already Assume You Have an AI Inventory. Do You?

Checkmarx argues regulators now expect organizations to maintain an AI inventory as AI-generated code and outputs enter security workflows.

Checkmarx contends that implicit trust in AI-generated code, AI summaries, and scanner output has become a governance liability that regulators no longer accept. The piece argues security teams must formalize AI inventories and treat AI outputs as untrusted inputs. It frames AI governance as an emerging compliance expectation rather than an internal maturity project.

Checkmarx·Aug 26, 09:15 UTC · 20d agoAI policy1

Researchers Turn USB Auto-Install Into a Full SYSTEM Takeover on Windows 11

DEF CON researchers chained Windows Plug and Play auto-install abuse with third-party driver flaws to reach SYSTEM on fully updated Windows 11.

In 'Plug And Pwn' research prepared for DEF CON 34, Alejandro Hernando and Borja Martinez emulated USB devices so Windows auto-installed signed vendor software, chaining a Sierra Wireless SwiService.exe SetDNS primitive, a Sony FeliCa co-installer path-traversal flaw that writes a DLL into System32, and device reconnection for SYSTEM code execution. A remote variant over Remote Desktop forges a synthetic Intel RealSense device and abuses a CRYPTBASE.dll search-order hijack when PnP or low-level USB redirection is enabled. Microsoft notes RDP does not allow supported PnP and RemoteFX USB redirection by default, and no in-the-wild exploitation has been reported.

The Hacker News·Aug 11, 10:48 UTC · Aug 11, 2026Research

MicroHasTEE: Bare-Metal Haskell for Type-Level Peripheral Ownership on Armv8-M

MicroHasTEE expresses TrustZone secure and non-secure firmware as one typed Haskell program, catching peripheral-ownership inconsistencies at compile time.

MicroHasTEE is a multiparty Haskell framework that models both TrustZone firmware images as participants in a single typed program, using type-level capability ledgers to track peripheral acquisition, configuration, transfer, and finalization. MicroHs compiles the shared program twice to produce separate bare-metal Secure and Non-secure firmware images. The framework rejects inconsistent resource use, post-configuration attribution changes, wrong-domain callbacks, and calls to unregistered Secure services. A door-lock case study on an STM32U5 Nucleo board produced images of 232.7 KiB and 228.4 KiB of flash with roughly 220 KiB of SRAM per domain.

arXiv cs.CR·Sep 11, 08:34 UTC · 5d agoResearch1

CHERI-D Reincarnate: efficient multicore CHERI temporal memory safety through allocation reincarnation (draft version)

CHERI-D Reincarnate adds allocation reincarnation to CHERI, quarantining generation IDs instead of memory to cut temporal memory-safety overheads on multicore systems.

The proposal extends CHERI-D temporal memory safety by quarantining exhausted generation IDs rather than memory slots, allowing freed memory immediate reuse through allocation reincarnation. It adds coherent ID caching and multicore support connecting physical coherence events to the virtually addressed ObjID buffer. The design was implemented as a hardware-software co-design across CHERI-Toooba FPGA softcore, QEMU, LLVM/Clang, and CheriBSD. Across evaluated workloads it substantially reduces memory-sweep frequency and quarantine overhead with low performance and hardware cost.

arXiv cs.CR·Sep 10, 14:19 UTC · 5d agoResearch

Linux Foundation takes on TRACE, a hardware-backed runtime evidence specification for AI agents

The Linux Foundation adopts TRACE, an OPAQUE-contributed spec giving AI agents hardware-attested, cryptographically verifiable runtime and compliance evidence.

The Linux Foundation accepted the TRACE (Trust, Runtime Attestation and Compliance Evidence) specification contributed by OPAQUE, developed with AMD, Intel, Microsoft, and the Technology Innovation Institute. TRACE binds runtime environment, software, policies, data classifications, and tool usage into a portable, cryptographically verifiable artifact, composing existing standards such as RATS, EAT, SLSA, SCITT, SPIFFE, and EAR. It recorded nearly 135,000 PyPI downloads within 10 weeks of its June 2026 introduction, and its technical workstream will be hosted by the Coalition for Secure AI.

Help Net Security·Aug 26, 00:00 UTC · 21d agoAI tools & infra

Understanding the Security Boundary of Obfuscation-based On-Device LLM Protection

Researchers formalize obfuscation primitives for TEE-protected on-device LLMs and show a Collapse attack breaks ArrowCloak, TSQP, and LoRO, then extend the boundary.

The paper formalizes obfuscation primitives for TEE-Shielded LLM Partition (TSLP) schemes that offload computationally intensive layers from a Trusted Execution Environment to external GPUs. A novel primitive-guided attack, Collapse, demonstrates a shared vulnerability in prominent published methods including ArrowCloak (Security'25), TSQP (S&P'25), and LoRO (NeurIPS'25). The authors then introduce two new obfuscation primitives and integrate them with existing constructs to formulate an extended security boundary (O_ext).

arXiv cs.CR·Sep 9, 12:51 UTC · 6d agoAI safety & security

AutoTrans: AI-Assisted Automatic Translation of Security Assertions for RISC-V Processors

AutoTrans uses LLMs with regex extraction and formal verification to automatically translate security assertions across RISC-V processors, achieving 78% unattended acceptance.

AutoTrans is an automated framework for translating verified security assertions between RISC-V processor targets, where manual translation takes hours per assertion. It combines a regex-based SystemVerilog signal extractor to prevent LLM signal hallucination, a pinned prompt template yielding byte-identical prompts resilient to model updates, and JasperGold FPV formal verification of generated assertions. Applied with DeepSeek V4 to translate assertions between RISC-V targets such as IBEX and NS31A, it achieves a 78% automatic translation acceptance rate without human intervention and 100% after human refinement.

arXiv cs.CR·Sep 9, 11:31 UTC · 6d agoResearch

Honeypot-Omaha and batch.py [Guest Diary], (Wed, Sep 2nd)

A SANS ISC guest diary describes batch.py, a Python tool that consolidates honeypot logs and enriches IOCs with threat intelligence data.

Written by a SANS.edu BACS intern, the diary explains analysis of the DShield Honeypot-Omaha sensor, which uses Cowrie to emulate SSH and Telnet and log attacker activity. The author's batch.py script implements a four-phase pipeline with SHA-256-generated master and guest authentication to consolidate JSON and log files, correlate data via external APIs, and produce MITRE, CVE, geolocation, threat-score and fingerprint enrichment for investigated indicators.

SANS Internet Storm Center·Sep 3, 02:02 UTC · 13d agoTools1

Security fixes in libfuse-3.18.3

libfuse 3.18.3 disables fuse_session_custom_io() by default to stop non-kernel peers from forging FUSE requests libfuse parses unvalidated.

libfuse 3.18.3 ships security fixes announced by Sam James on the oss-security mailing list. The fuse_session_custom_io() function is now disabled unless libfuse is built with -Denable-custom-io=true, returning -ENOTSUP otherwise. The reason is that a custom io peer might not be a kernel and can forge requests that libfuse parses without validation. The hello_ll_uds example is now built only with that option, and enabling it triggers a warning at configure time.

oss-security·Sep 9, 01:33 UTC · 7d agoVulnerability

Retrospectively Reverse-Engineering Apple's Neural Engine

A developer reverse-engineers Apple's M1 Neural Engine architecture, mapping compute cores, MAC datapaths, and schedulers to explain the NPU's decline as transformers displaced CNN workloads.

A developer who previously maintained a reverse-engineered Linux driver for Apple's Neural Engine (ANE) published a retrospective deep dive mapping the M1 ANE's full internal architecture: compute, datapath, scheduler, memory, and execution model. The M1 ANE has 16 compute cores with 128 FP16 (or 256 INT8) MAC lanes each, totaling 2048 parallel MAC lanes, using 32-bit Q16.16 fixed-point accumulation with FP16 readout and an accumulator that saturates at 2^15. The author argues the ANE's dataflow was architected around the predictable reuse patterns of 2017-era CNN workloads (dating to the A11 Bionic), which autoregressive transformer decode broke, limiting its usefulness for general ML. With Apple's M5 folding ANE cores into GPU cores to tout LLM performance, the post frames this as the beginning of the end for the standalone NPU.

Hacker News · AI·Sep 12, 07:54 UTC · 4d agoAI researchHN 54↑ · 7 comments2

SafePal latest crypto hardware wallet maker affected by breach, with nearly 40,000 impacted

SafePal confirmed nearly 40,000 customers' order data was stolen, the third hardware wallet maker breached in a month after Trezor and Coinkite.

SafePal confirmed a breach exposing names, emails, shipping addresses, phone numbers, and purchase details of customers who ordered between March 2, 2025 and April 11, 2026, caused by a flaw in an order-tracking plugin. The company stressed wallets, seed phrases, and private keys remain secure, and all impacted customers were notified by email. A hacker advertised the stolen data on a dark web forum, and SafePal warned of targeted phishing via fake support calls and refund offers. CertiK data cited in the report shows 52 wrench attacks worldwide in H1 2026 with $124 million in losses, up 33% year-over-year.

The Record·Aug 17, 16:59 UTC · 29d agoData breach in the wild

TPMSpy: Validation of Measured Boot Systems by Low-Level Tracing of TPM Usage

Researchers present TPMSpy, a platform-agnostic method validating TPM Measured Boot via low-level tracing, finding inconsistent Linux systemd measurements that break remote attestation and LUKS decryption.

An arXiv paper (2609.05011) introduces TPMSpy, a method that analyzes virtualized system–TPM interactions to independently reconstruct and validate TPM Event Logs without relying on the quoting mechanism, applicable to open and closed systems and demonstrated on Linux and Windows. A longitudinal analysis of Linux systems running systemd versions 245–258 (2020–2025) found wide divergence in Measured Boot usage, undocumented behavioral changes, and no common usage pattern. The authors report inconsistent measurement of user-space systemd services, which prevents reliable remote attestation and LUKS disk decryption on affected systems.

arXiv cs.CR·Sep 4, 11:23 UTC · 11d agoResearch