Search: “processor security”

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CategoryAll Vulnerability 371 Malware 239 Ransomware 182 Exploit / PoC 149 Policy & legal 116 Data breach 102 Industry 92 Phishing & fraud 58 Threat actor 41 Research 32 AI industry 29 AI tools & infra 14 Tools 12 Advisory 10

SeverityAll critical 495 high 389 medium 334 low 177 info 74

AutoTrans: AI-Assisted Automatic Translation of Security Assertions for RISC-V Processors

AutoTrans uses LLMs with regex extraction and formal verification to automatically translate security assertions across RISC-V processors, achieving 78% unattended acceptance.

AutoTrans is an automated framework for translating verified security assertions between RISC-V processor targets, where manual translation takes hours per assertion. It combines a regex-based SystemVerilog signal extractor to prevent LLM signal hallucination, a pinned prompt template yielding byte-identical prompts resilient to model updates, and JasperGold FPV formal verification of generated assertions. Applied with DeepSeek V4 to translate assertions between RISC-V targets such as IBEX and NS31A, it achieves a 78% automatic translation acceptance rate without human intervention and 100% after human refinement.

arXiv cs.CRSep 9, 11:31 UTC · 7d agoResearch

Apple Reference Image: A New Approach for Verified Photography

Apple introduces Reference Image, hardware-backed verifiable photography on iPhone 18 Pro using sensor signing and Private Cloud Compute to counter AI-generated fakes.

Apple announced Reference Image, an opt-in camera mode debuting on the main sensor of iPhone 18 Pro and iPhone 18 Pro Max that produces securely timestamped, verifiable photographs. The design splits into two phases: a secure digital negative created by cryptographically signing pixel data at the sensor immediately after capture (preventing injection or tampering), then developing that negative into a reference image. Private Cloud Compute handles processing without exposing image contents to anyone, including Apple, and fraudulent reference images can be revoked without revealing the photographer's identity. Apple positions the system as stronger than C2PA-based approaches, which sign metadata after capture, are vulnerable to editing-chain compromise, and can tie images to a device or individual.

Hacker News · security02:07 UTC · 17h agoResearch HN 25↑ · 18 comments

SCHERI: Provably Secure Speculation Under the Constant-Time Policy for CHERI (Extended Version)

Researchers formally prove existing CHERI speculation proposals leak secrets and present SCHERI, a processor design with end-to-end Spectre-resistant constant-time guarantees.

The paper builds a formal framework reasoning jointly about capability safety, speculative execution, and information-flow security on CHERI architectures. It demonstrates that existing secure-speculation proposals fail to preserve constant-time confidentiality guarantees and can transiently leak isolated secrets. The authors present SCHERI, a new processor design formally proven to provide end-to-end secure speculation for the constant-time policy, resilient to Spectre attacks.

arXiv cs.CRSep 15, 16:33 UTC · 1d agoResearch

Why Johnny Can't Encrypt: A Usability Evaluation of PGP 5.0 (1999)

Seminal 1999 USENIX study finds most novice users cannot correctly sign and encrypt email with PGP 5.0 in 90 minutes.

Whitten and Tygar's USENIX Security Symposium paper evaluates whether cryptography novices can use PGP 5.0 effectively, using cognitive walkthrough analysis and a laboratory user test. The majority of test participants failed to successfully sign and encrypt a message within 90 minutes, despite PGP 5.0 having a well-regarded graphical interface. The authors argue that security requires usability standards beyond those of general consumer software and propose domain-specific UI design principles for security. The paper is a foundational reference in usable security research.

Lobsters · securitySep 9, 06:47 UTC · 7d agoResearch

Hardware Fingerprinting FTQC via Quantum Decoder Timing

Quantum decoder timing on IBM Heron processors forms a side channel enabling device fingerprinting with 89% accuracy and workload inference.

The work demonstrates that wall-clock syndrome-decoding times on fault-tolerant quantum computers constitute a novel hardware side channel. Using per-shot decoder timings from three IBM Heron processors collected over 68 days, a passive observer can reconstruct detector-firing distributions, estimate logical error rate, infer code distance, and fingerprint the specific device with up to 89% accuracy versus 33% for random guessing. Noisy simulation based on Google's 105-qubit Willow processor distinguishes nine surface-code patches at 81% accuracy, showing the channel persists across vendors and code families.

arXiv cs.CRSep 10, 19:24 UTC · 6d agoResearch