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Differential Privacy Meets Fixed Parameter Tractability: Algorithms and Lower Bounds
Theory paper combines differential privacy with fixed-parameter tractable encoders, improving approximation guarantees for combinatorial optimization and proving new lower bounds.
The paper studies combinatorial optimization under epsilon-differential privacy within the implicit encoder-decoder framework of Gupta et al. (SODA 2010), generalizing it to allow fixed-parameter tractable encoders. This circumvents approximation barriers inherent to polynomial-time algorithms and yields improved guarantees for fundamental combinatorial optimization problems. The authors establish the first representation-independent lower bounds: assuming a non-uniform variant of the Gap Exponential Time Hypothesis, no epsilon-DP encoder-decoder pair can achieve certain approximation guarantees with a subexponential-time decoder for sufficiently small epsilon. Representation-dependent lower bounds are also provided for larger epsilon.
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SpliTEE: Improving LLM Inference on Trusted Hardware with Differentially Private GPU Outsourcing
SpliTEE splits LLM inference between Intel TDX trusted execution and untrusted GPUs, using differential privacy instead of encryption to protect intermediate representations.
SpliTEE extends split inference to LLMs, running inference partly inside an Intel TDX TEE while masking intermediate inputs sent to untrusted GPUs with differential privacy rather than encryption. The authors show a prompt-reconstruction attack recovers nearly 80% of prompts from unmasked intermediate representations, motivating the masking. A global sensitivity analysis bounds the required DP noise scale, avoiding quantization and keeping models in floating point. The implementation is nearly twice as fast as full CPU-based TDX inference and 5-15 seconds faster than encryption-based Slalom with higher accuracy, evaluated on Llama-3.2-3B and Qwen3-4B.
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Your Shredded Visa Card May Still Work at the Checkout
UMass Amherst researchers demonstrated expired Visa contactless cards can complete real purchases via relay attacks exploiting Visa Kernel 3's unsigned expiry date handling.
University of Massachusetts Amherst researchers presented at USENIX Security 2026 that expired Visa contactless cards can be revived for real purchases through an NFC man-in-the-middle attack on Visa's Kernel 3. The attack alters the expiry date the terminal sees (tag 5F24) while leaving the Track 2 Equivalent Data (tag 57) sent to the issuing bank unchanged, and the card's cryptographic signature does not cover the expiry date. Two Android phones emulating card and terminal relayed transactions within Visa's 500-millisecond limit. Mastercard, American Express, and Discover kernels blocked the attack, while Visa Kernel 3 did not; researchers also modified the Consumer Device Cardholder Verification Method flag at five US banks, and attackers can also exploit Terminal Verification Results zero-filling. Visa was notified in May 2025 and December 2025; no CVE has been assigned.
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Zombie Card Attack Can Revive Expired Visa Cards for Contactless Payments
UMass Amherst researchers demonstrate Zombie Card, an NFC relay attack that revives expired Visa contactless cards for in-store purchases without breaking cryptography.
Researchers at the University of Massachusetts Amherst presented the Zombie Card attack at USENIX Security 2026, showing that Visa's Kernel 3 does not cryptographically bind the Application Expiration Date (tag 5F24) the terminal reads with the Track 2 expiry seen by the issuer. By positioning an NFC man-in-the-middle relay, an attacker can rewrite the terminal-facing expiration date of an expired card and complete contactless purchases, provided the account remains open under the same PAN and the bank does not independently re-check expiry. Testing across five major US banks found three distinct policies; Visa Kernel 3 accepted the modified date, while Mastercard, American Express, and Discover kernels declined modified transactions. Findings were disclosed to Visa and affected banks in May 2025, no CVE has been assigned, and no exploitation has been reported.
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SEMA-GUARD: Semantic and Graph-Based Vulnerability Detection in Assembly Code
SEMA-GUARD uses semantic analysis and graph neural networks to detect vulnerabilities in assembly code, achieving 85.1% accuracy on a Juliet-derived benchmark.
SEMA-GUARD is a framework that detects vulnerabilities in compiled programs when source code is unavailable, targeting malware, firmware, and embedded systems analysis. It enriches control flow graphs with low-level execution semantics including stack manipulations, memory accesses, and data flow. Evaluated on a Juliet Test Suite set compiled to assembly and split into function-level chunks, it achieves 85.1% accuracy and an F1 score of 0.801, outperforming purely statistical or structural approaches.
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Unmasking Cloud Identities: From Behavioral Clustering to Automated Detection
Unit 42 clusters behavior of 40,000+ AWS identities from 125 cloud environments to map functional roles and enable lightweight SQL-based detection.
Palo Alto Unit 42 built an unsupervised behavioral clustering model using UMAP and HDBSCAN on AWS CloudTrail logs to map cloud identities to functional roles such as administrators, backup services, security tooling and DevOps. The study analyzed over 40,000 identities across 125 cloud environments over two months. The researchers show that heuristics extracted from the clustering map can be implemented in standard SQL, enabling role classification at scale without running a continuous ML pipeline. The methodology extends to audit logs from other cloud providers, SaaS and Kubernetes.
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A Graph-Based Approach for Mapping Kernel-Level Telemetry to MITRE ATT&CK
Trace2ATT&CK maps eBPF kernel telemetry to MITRE ATT&CK via provenance graphs and RAG with local open-weights LLMs, validated on 347 Atomic Red Team tests.
Trace2ATT&CK collects kernel-level events via eBPF, correlates attacker commands into a provenance graph, and derives compact graph representations suitable for LLM-based reasoning, mapping behavior to MITRE ATT&CK techniques with ranked candidates and rationales. Mapping uses both pure LLM prompting and retrieval-augmented generation grounded in the ATT&CK knowledge base. It was evaluated on 347 Linux Atomic Red Team tests using locally deployed open-weights LLMs. RAG consistently improved ATT&CK mapping over pure prompting, and provenance graphs substantially outperformed raw telemetry, without compromising data confidentiality.
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Differentially Private EEG Feature Anonymization: A Privacy-Utility Case Study in Clinical Neurophysiology
Case study applies Gaussian and Laplace differential privacy to clinical EEG features, quantifying privacy-utility trade-offs across three deployment scenarios.
Researchers evaluate subject-level differential privacy for EEG-derived feature representations using Gaussian and Laplace perturbations across client-side, centralized server-side, and decentralized local training scenarios. Utility is assessed with statistical measures and a downstream machine-learning check on clinical neurophysiology data. Results show DP can be integrated into EEG workflows, but mechanism choice, privacy parameters, and sensitivity calibration strongly influence data utility, particularly on small and imbalanced clinical datasets. The study highlights the privacy-utility trade-off in protecting biomedical signals against re-identification and inference risks.
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Testing race conditions with memory access tracing and stack-based delay injection
Google Project Zero released MAccConc, Linux kernel tooling that traces memory accesses to explore and test race condition interleavings.
A Google Project Zero researcher published MAccConc (Memory Access Concurrency), tooling for exploring possible interleavings of multithreaded test cases in the Linux kernel, available on GitHub. The tools use KCOV with ASAN outline-mode instrumentation to record per-access memory traces, enabling automatic testing of all A-B-A interleavings plus terminal and GUI explorers for manual analysis. The work targets confirming race condition candidates, building reliable regression tests, and enabling concurrency fuzzing, drawing on ideas from SKI and Ned Williamson's sockfuzzer.
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TasmScan: Continuation-Aware Taint Analysis for TVM Bytecode with Savelist Abstraction
TasmScan introduces source-free taint analysis for TON smart-contract bytecode, detecting 95.3% of defects with 96.8% precision and 17x speedup.
TasmScan is the first bytecode-level static analysis framework for the TON Virtual Machine, enabling cross-continuation data flow reasoning without source code by modeling savelist semantics through forward register analysis with formal over-approximation guarantees. It lifts bytecode into a typed intermediate representation (TASIR) and performs path-sensitive taint analysis. On a 208-contract benchmark with human-confirmed ground truth it detects 95.3% of defects across five classes at 96.8% precision, and resolves 294,546 dynamic continuation targets with 100% precision across 2,921 registry contracts. It achieves a 17x median speedup over symbolic-execution baselines.
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New DDRop Attack Breaks Intel TDX and AMD SEV-SNP With $159 DDR5 Device
DDRop uses a $159 DDR5 RDIMM interposer to silently drop memory writes and break Intel TDX and AMD SEV-SNP confidential VMs.
Researchers published DDRop, a physical attack built from about $159 in parts that uses a custom DDR5 RDIMM interposer to inject parity errors and silently discard selected cache-line writebacks. Intel TDX, Intel Scalable SGX, and AMD SEV-SNP are affected because they lack per-line cryptographic freshness, so processors can accept stale encrypted data as valid state. The team demonstrated deterministic plaintext copying between pages, malicious Secure EPT entry injection, forcing trust domains into debug mode, and forging attestation measurements. The attack requires privileged host control plus brief physical access, and researchers say no simple software patch exists.
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DDRop Attack Forces Intel TDX Confidential VMs Into Debug Mode and Exposes Memory
KU Leuven and ETH Zurich researchers released DDRop PoC hardware that forces Intel TDX confidential VMs into debug mode and exposes plaintext memory.
Researchers from KU Leuven, ETH Zurich, Google, and Durham University published proof-of-concept code, hardware designs, and firmware for DDRop, a DDR5 interposer that injects parity errors to drop selected cache-line writebacks. Because Intel TDX, Intel Scalable SGX, and AMD SEV-SNP lack per-line cryptographic freshness, processors decrypt and accept stale DRAM contents as current state. The PoC flips a victim's ATTRIBUTES.DEBUG flag to enable TDX debug mode, then copies victim memory in plaintext and can forge attestation reports. Affected environments include Intel 5th- and 6th-generation Xeon Scalable with TDX; Intel says the attack falls outside its cloud-computing threat model.
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No Bit Left Behind: Using Brute-Force Lifting to Achieve Fully Static Binary Recompilation
Prototype binary lifter brute-force lifts every byte offset of x86-64 binaries to LLVM IR, enabling fully static cross-ISA recompilation without runtime support.
The paper presents a fully static, whole-program binary lifting system that treats every byte offset as a potential branch target, constructing a superset control flow graph that conservatively contains all feasible control flows. Statically unresolvable computed branches are reduced to lookups in a dispatch table pointing to translated control flow paths, eliminating runtime translation machinery on the target machine. A prototype recompiles x86-64 binaries to LLVM IR with no code/data heuristics and achieves fully static cross-compilation to AArch64 using unmodified LLVM backends.
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Navigating the Latent Manifold: Proactive Concept Drift Adaptation for Resilient NIDS
Researchers propose DriftXpert, a concept-drift-adaptive network intrusion detection system validated on enterprise networks, addressing degraded AI-based NIDS performance in dynamic traffic.
AI-based network intrusion detection systems assume static data distributions and degrade under concept drift, raising false positives in dynamic environments. DriftXpert uses a two-stage offline framework: an unsupervised latent-manifold anomaly metric to detect traffic drift, and representation consistency alignment with cross-epoch neuron weight aggregation and selective freezing to transfer knowledge without catastrophic forgetting. Experiments on public datasets and a real enterprise network show effective adaptation to drifted data while retaining known-attack detection.
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Autoencoder Is All You Need: Profiling and Detecting Malicious DNS Traffic
Palo Alto Unit 42 details an autoencoder-based method that profiles DNS traffic to detect C2 and malicious domains, blocking ~374,000 malicious DNS requests daily.
Unit 42 built an RNN-based autoencoder that compresses DNS traffic time series into fixed-dimensional 'DNS profiles' for each domain and device. Downstream classification, clustering, and anomaly detection modules flag suspicious domains, capturing 170 emerging suspicious domains in May 2024. Signatures block roughly 374,000 malicious DNS requests daily and run in the Advanced DNS Security service, with detections shared to Advanced URL Filtering. Case studies link DNS traffic patterns to C2 beaconing, dynamic DNS abuse, and DNS tunneling for data exfiltration.
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The Gopher in the Room: Analysis of GoLang Malware in the Wild
Unit 42 analysis of 10,700 Go-compiled malware samples shows steady growth in the wild, with 92% targeting Windows and top families including Veil, GoBot2, and HERCULES.
Unit 42 collected roughly 10,700 unique Go-compiled malware samples and found that Go usage by malware developers has steadily risen in recent months. About 92% of samples targeted Windows and 75% were attributed to known families, led by Veil, GoBot2, and HERCULES. The most prevalent groupings were penetration testing tools, remote access Trojans, and backdoors. Statically linked Go binaries average 4.65MB, which can complicate phishing delivery but sometimes causes antivirus products to skip or fail scanning.
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