Search: “high-bandwidth-memory”

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PhysStream: Streaming Physics-Grounded Video Generation with Structured Scene Memory and Fine-Grained Motion Control

PhysStream autoregressive video model enables physics-grounded mid-generation motion control, cutting trajectory error 12% and FVMD 33% versus strongest baselines.

PhysStream is an autoregressive image-to-video model that incorporates structured scene memory—positional maps and object tracking maps derived online from previously generated frames—and supports fine-grained motion control via sparse velocity-increment signals encoding physical quantities. Training proceeds in two stages: a bidirectional model finetuned with motion-control conditioning, then a causal autoregressive model with scene memory. It reduces motion distribution distance (FVMD) by 33% and trajectory error by 12% over the strongest baselines, and human evaluators prefer it in over 85% of in-the-wild comparisons.

arXiv cs.AI / cs.LG / cs.CL·Sep 15, 17:55 UTC · 1d agoAI research 2 sources1

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CHERI-D Reincarnate: efficient multicore CHERI temporal memory safety through allocation reincarnation (draft version)

CHERI-D Reincarnate adds allocation reincarnation to CHERI, quarantining generation IDs instead of memory to cut temporal memory-safety overheads on multicore systems.

The proposal extends CHERI-D temporal memory safety by quarantining exhausted generation IDs rather than memory slots, allowing freed memory immediate reuse through allocation reincarnation. It adds coherent ID caching and multicore support connecting physical coherence events to the virtually addressed ObjID buffer. The design was implemented as a hardware-software co-design across CHERI-Toooba FPGA softcore, QEMU, LLVM/Clang, and CheriBSD. Across evaluated workloads it substantially reduces memory-sweep frequency and quarantine overhead with low performance and hardware cost.

arXiv cs.CR·Sep 10, 14:19 UTC · 6d agoResearch

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A Three-Layer Caching Architecture for Low-Latency LLM Web Search on Commodity CPU Hardware

OreoLook's three-layer Redis caching architecture cuts redundant LLM calls and embedding work for CPU-hosted web-search answer generation.

The paper describes a three-layer caching architecture for OreoLook (formerly lixSearch), an open-source LLM answer engine: a Redis session context window with Huffman-compressed disk overflow, a semantic query cache matching rephrasings via embedding cosine similarity, and a URL embedding cache deduplicating embedding computations. Deployed on a single 8-vCPU Intel Cascade Lake server with 30 Hypercorn workers across three containerized replicas, it achieved an 89.3% aggregate Redis keyspace hit rate, 0.1 ms read latency, and 1.38 MB memory overhead. An LRU eviction daemon migrates idle sessions to disk and rehydrates them for resumption hours or days later.

Hugging Face daily papers·Aug 11, 20:00 UTC · Aug 11, 2026AI tools & infra1

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Bias-Induced Crossover in Absolute Capacity of Dense Associative Memory

Analysis shows biased patterns cut dense associative memory capacity from N^(n-1)/ln N to O(N^(n/2)), with a bias-induced crossover.

The paper analyzes dense associative memory capacity for biased centered binary patterns under the Krotov-Hopfield single-site criterion. Unbiased patterns (q=1/2) with order-n polynomial interactions yield capacity of order N^(n-1)/ln N, while fixed bias q<1/2 reduces capacity to O(N^(n/2)) for even n>=4 and O(N^((n+1)/2)) for odd n>=5. A bias-dependent crosstalk mean destabilizes sites carrying the frequent value, and an activity-dependent control potential restores the higher capacity within the conditioned-Gaussian approximation.

arXiv cs.AI / cs.LG / cs.CL·Sep 15, 17:16 UTC · 1d agoAI research

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FreeFlow: A Bias-free Hierarchical Transformer for Optical Flow Estimation

FreeFlow is a bias-free hierarchical transformer achieving state-of-the-art optical flow results on Sintel, KITTI-2015, and Spring benchmarks.

FreeFlow replaces task-specific inductive biases like correlation volumes and iterative warping with a single feed-forward encoder-decoder combining window, shifted-window, and reduced-resolution global attention. It reaches 0.68/1.48 EPE on Sintel Clean/Final, 3.23 Fl-all on KITTI-2015, and 3.192 1px on Spring. The architecture scales consistently from small to large variants and remains memory efficient at 1080p inference.

Hugging Face daily papers·Sep 9, 20:00 UTC · 7d agoAI research

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Why Is Video Still So Expensive? A Survey of Inference-Efficiency Mechanisms in Video and Audiovisual LLMs

A survey catalogs inference-efficiency techniques for video and audiovisual LLMs, mapping bottlenecks in sampling, encoding, token reduction, and LLM decoding.

This survey covers inference-efficiency mechanisms for visual and audiovisual video LLMs, reporting reductions in parameters, FLOPs, latency, memory, and token counts. It organizes methods by pipeline stage, covering frame sampling, modality encoding, connector-level token reduction, and LLM prefilling and decoding for systems built since late 2022. The authors compile accuracy-cost comparisons under shared host models and input protocols, identify gaps in audiovisual efficiency and standardized evaluation, and maintain a public repository.

Hugging Face daily papers·Sep 8, 20:00 UTC · 8d agoAI research

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DeepSeek-v4.1 Flash: Pushing the Limits of KV Cache Compression

DeepSeek-V4.1 Flash is a 552B-parameter multimodal MoE model with 1M-token context achieving 4x KV cache compression for long-horizon agent workloads.

A detailed analysis of the DeepSeek-V4.1 Flash technical report describes a 552B-parameter multimodal mixture-of-experts model supporting contexts up to 1 million tokens. Its Causal Encoder-Decoder (CED) architecture activates 8B parameters during prefill and 16B during decode, and reportedly delivers about 420 tokens/s. Joint optimization of architecture (CSA2 cross-layer compression), FP4 KV cache precision, and deployment strategy cuts runtime KV cache to roughly 1/4 and persistent KV cache to about 1/8 of DeepSeek-V4-Flash at the same sequence length, targeting storage and bandwidth bottlenecks in long-horizon agent serving. The author notes all DeepSeek-V4 Pro models were taken offline following the release.

Hacker News · AI·01:39 UTC · 4h agoModel release 4 sourcesHN 41↑ · 3 comments

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Memory-Efficient Designs for Word-Wise Universal Fully Homomorphic Encryption

BXT framework mitigates FHE memory bottlenecks via ciphertext compression, serialization, delayed seeding, and digit pruning, achieving up to 3.8x CNN inference speedup.

A new paper proposes BXT, an optimization framework for word-wise Universal Fully Homomorphic Encryption that targets the memory bottleneck rather than compute. It combines four techniques: ciphertext compression via seed regeneration, bit-packed ciphertext serialization for L2-to-L1 transfers, delayed PRNG-heavy offline seed generation across aggregated operations, and fault-aware ciphertext digit pruning. On CNN inference, the BXT-CSO50 configuration achieves up to 3.8x speedup over a 100x GPU baseline with under 1% accuracy loss at 50% comparison precision.

arXiv cs.CR·Sep 4, 06:03 UTC · 13d agoResearch

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VC-Attention: Value Smoothing and Softmax Casting for Low-bit Attention

VC-Attention is a training-free low-bit attention method for diffusion transformers, achieving 1.46-1.59x kernel speedups on datacenter GPUs with higher fidelity.

VC-Attention is a training-free low-bit attention framework for diffusion transformers that pairs V-Smooth value smoothing via lightweight online clustering with ExpCast-FP8, which maps log-domain scores directly to E4M3 FP8 probability codes and eliminates the FP32 softmax exponential. It is implemented for B200, B300, H200, RTX PRO 6000, and RTX 5090 GPUs. Across Wan2.2, LongCat-Video, HunyuanVideo-1.5, and MiniMax-H3, it improves fidelity over low-bit baselines and speeds attention 1.46-1.59x over BF16 FlashAttention-4 on datacenter Blackwell and Hopper GPUs and 2.3-3.6x on workstation cards, with 1.13-1.70x faster end-to-end clip generation.

Hugging Face daily papers·updated 00:45 UTC · 5h ago·first Sep 13, 20:00 UTC · 3d agoAI research 2 sources

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SimpleMemVLA: A Simple but Effective Native-Video Memory for Vision-Language-Action Models

SimpleMemVLA passes full timestamped video history straight to a VLA backbone, setting state of the art on four memory benchmarks.

SimpleMemVLA is a vision-language-action model for long-horizon manipulation that removes the dedicated memory module entirely. It keeps sampled history intact and feeds it to the backbone as timestamped video, with the hidden states of a generated sub-task serving as the only channel into a standard flow-matching action head. Prefilling the shared history prefix during action execution keeps latency close to a single-frame VLA. The system sets a new state of the art on four memory benchmarks and outperforms retrieval, compression and recurrent-state mechanisms, with causal interventions confirming the policy genuinely reads its history.

Hugging Face daily papers·Sep 1, 20:00 UTC · 15d agoAI research

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New hardware device can RAM into encrypted memory, expose your data

Researchers built a $200 DDR5 interposer that silently drops memory writes to break TDX, SGX, and SEV-SNP confidential VM integrity, requiring physical access.

Researchers from KU Leuven, ETH Zurich, Durham University, and Google demonstrated DDRop, a hardware interposer costing under $200 that corrupts DDR5 bus commands to silently drop writes to encrypted memory, enabling replay attacks on confidential VMs. Because scalable memory encryption lacks freshness checks, protected VMs keep computing on stale attacker-selected data; on an Intel TDX server the attack forces debug mode for plaintext memory reads or forges attestation reports, succeeding in under two minutes without crashing. Intel and AMD both called the attack out of scope for their cloud threat models, with no mitigation planned, and proposed cache line versioning appears still vulnerable. The full interposer design is being released as open-source hardware.

The Register · Security·Sep 14, 18:31 UTC · 2d agoResearch

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Long-Lived Characters, Local Inference: Incremental Memory Maintenance for Game NPCs

Researchers present incremental KV-cache memory maintenance for long-lived game NPCs running locally on a quantized Qwen hybrid model.

The paper studies incremental memory maintenance for long-lived game NPCs deployed locally with a quantized Qwen hybrid recurrent-attention language model. The runtime removes superseded attention KV entries, computes replacement records at the true sequence tail, and preserves the continuing recurrent state and unchanged KV. Experiments across eight scripted maintenance rounds show true-tail updates preserve current-state and historical bindings, while slot-preserving alternatives repeat a double-subtraction error.

arXiv cs.AI / cs.LG / cs.CL·Sep 16, 17:09 UTC · 12h agoAI research

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CertiFlash: A Formal Verification Framework for Flash Translation Layers in Computational Solid State Drives

CertiFlash provides machine-checked formal verification of SSD flash translation layers, proving isolation, integrity, and ownership invariants to prevent tenant data leaks.

CertiFlash is an open-source formal verification framework for Flash Translation Layers (FTL) in computational SSDs, mechanized in the Rocq proof assistant. It shows that a faulty FTL can corrupt device state at five surfaces (e.g., leaking data between tenants or dropping integrity tags), demonstrated on a DaisyPlus OpenSSD. Designers prove once that every operation of a general FTL model preserves a global invariant covering mapping, isolation, integrity, ownership, and allocation; new designs need only discharge five hypotheses. Across four case studies, added effort was 27-3,231 lines against a 16,489-line framework.

arXiv cs.CR·Sep 9, 15:44 UTC · 7d agoResearch1

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Hoss: Fast Oblivious Semantic Search with Heterogeneous GPU-CPU-TEE Architecture

Hoss uses heterogeneous GPU-CPU TEEs for oblivious semantic search, achieving up to 67x speedup over the Compass ORAM-based system.

Hoss is a first-of-its-kind oblivious semantic search system built on a heterogeneous CPU-GPU TEE architecture, hosting hot-path HNSW graph traversal in large GPU TEE private memory and offloading lower graph layers to CPU TEEs. It invokes oblivious primitives only for lower-layer accesses and adds host-access ORAM and data-dependent optimizations. Benchmarked against prior state-of-the-art Compass, the prototype achieves up to 67x speedup while maintaining high recall, with larger gains at scale.

arXiv cs.CR·Sep 3, 22:21 UTC · 13d agoResearch

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LACE: Layer-Wise Compression for Dynamic Frame Rate Codecs

LACE introduces layer-wise compression for dynamic frame rate audio codecs, cutting sequence lengths and speeding TTS inference while preserving quality.

LACE (Layer-Adaptive Codec Encoding) applies an independent compression step at each quantization layer of a neural audio codec, enabling layer-specific segmentation boundaries instead of shared ones. Union alignment and boundary anchor mechanisms keep durations consistent for downstream text-to-speech. On LibriTTS, LACE achieves a better rate-quality tradeoff than prior dynamic frame rate codecs and improves TTS inference efficiency at competitive synthesis quality. Code is released in the ESPnet3 codec recipe.

arXiv cs.AI / cs.LG / cs.CL·Sep 15, 17:46 UTC · 1d agoAI research1

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Towards Standardized Evaluation of GPU Memory Safety with GMSBench

GMSBench provides 149 CUDA tests covering spatial, temporal, and concurrency GPU memory errors, exposing detection gaps in Compute Sanitizer.

GMSBench is a GPU memory safety benchmark comprising 149 self-contained CUDA tests spanning spatial, temporal, and concurrency errors across different GPU memory spaces and execution scenarios. The authors evaluate NVIDIA's Compute Sanitizer across multiple GPU architectures using the suite, exposing gaps in its detection coverage. The benchmark offers a standardized foundation for comparative evaluation of GPU memory safety mechanisms.

arXiv cs.CR·Sep 8, 15:11 UTC · 8d agoResearch

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Online Draft Co-Training for Speculative Decoding in Large-Scale, Long-Context RL Post-Training

NVIDIA researchers detail an end-to-end system for online draft co-training that speeds speculative decoding in large-scale long-context RL post-training.

The paper tackles scaling online draft co-training for speculative decoding in RL post-training, where rollout generation dominates cost. It extends packed, load-balanced zigzag ring attention to merge rank-local branch attention with causal main-sequence attention for context parallelism, and introduces TapChannel to transport target features across pipeline-parallel stages without changing the schedule. Experiments show co-trained drafts tracking the policy baseline with substantial rollout and end-to-end speedups up to 122B parameters and strong scaling at 256K tokens.

Hugging Face daily papers·Sep 6, 20:00 UTC · 10d agoAI research1

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PHAT: PHotonic Accelerator for TFHE

PHAT photonic accelerator using optically addressed phase-change memory speeds TFHE bootstrapping FFTs 2.14x-5.10x over the prior ASIC accelerator.

Researchers propose PHAT, an electro-photonic accelerator for TFHE fully homomorphic encryption built on optically addressed phase-change memory (OPCM) processing-in-memory. The architecture adds OPCM-based FFT units, a twiddle-stationary dataflow, and a scheduling mechanism to maximize FFT utilization for TFHE bootstrapping. It achieves 2.14x-5.10x speedups across four real-world TFHE workloads versus the state-of-the-art ASIC accelerator, improving feasibility of privacy-preserving computation in the cloud.

arXiv cs.CR·Sep 10, 14:30 UTC · 6d agoResearch

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Pre-Whitening and BCJR Posterior Distillation for Bi-LSTM Detection in Faster-than-Nyquist Signaling

Study shows nested-window Bi-LSTM architectures do not improve faster-than-Nyquist detection; pre-whitening plus BCJR distillation cuts bit error rates.

Across roughly 260 controlled trainings, processing nested intersymbol-interference windows in separate recurrent branches never significantly beat a plain Bi-LSTM at matched parameter budgets. The authors attribute the limitation to the observation model rather than architecture, and instead pre-whiten inputs and distill BCJR soft posteriors into the network. With 3.4% more parameters, the method reaches 1.05x the BCJR bit error rate at compression factor 0.8 and 1.89x at 0.7, improving to 1.47x with a wider whitened window.

arXiv cs.AI / cs.LG / cs.CL·Sep 7, 17:07 UTC · 9d agoAI research

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Architecting memory and storage in the AI era

Analysis argues AI inference shifts data-center bottlenecks to memory and storage, urging balanced compute, memory, storage, and network architecture over raw compute.

MIT Technology Review, citing Tirias Research principal analyst Jim McGregor, argues that AI inference and agentic workloads make data movement the key constraint, elevating memory and storage from background hardware to strategic assets. The piece says RAG and real-time inference require continuous data retrieval and caching that legacy infrastructure cannot support. It frames infrastructure planning as a business decision balancing performance, efficiency, cost, and scalability in healthcare, finance, and customer-facing AI.

MIT Technology Review · AI·Sep 4, 18:39 UTC · 12d agoAI industry

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MeClear: Cooperative Game-Theoretic Attribution and Risk-Aware Memory Clearance for Long-Horizon LLM Agents

MeClear uses cooperative Shapley attribution to clear harmful memories from long-horizon LLM agents, boosting task recovery by 25.5 points over baselines.

The paper introduces MeClear, a task-conditioned memory clearance framework for long-horizon LLM agents that identifies and selectively suppresses memories with negative downstream utility without permanently altering the persistent memory bank. It combines Leave-One-Out screening with sampled cooperative Shapley attribution to distribute utility across interacting evidence, resolving redundant conflict masking that single-removal evaluations miss. Across ten long dialogue memory pools it achieves 85.9% target recall and 82.3% overall task recovery, a 25.5 percentage-point improvement over LOO baselines.

arXiv cs.AI / cs.LG / cs.CL·Sep 8, 17:46 UTC · 8d agoAI research

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Testing race conditions with memory access tracing and stack-based delay injection

Google Project Zero released MAccConc, Linux kernel tooling that traces memory accesses to explore and test race condition interleavings.

A Google Project Zero researcher published MAccConc (Memory Access Concurrency), tooling for exploring possible interleavings of multithreaded test cases in the Linux kernel, available on GitHub. The tools use KCOV with ASAN outline-mode instrumentation to record per-access memory traces, enabling automatic testing of all A-B-A interleavings plus terminal and GUI explorers for manual analysis. The work targets confirming race condition candidates, building reliable regression tests, and enabling concurrency fuzzing, drawing on ideas from SKI and Ned Williamson's sockfuzzer.

Google Project Zero·Sep 8, 07:00 UTC · 8d agoResearch2

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How CHERIoT Provides Strong and Usable Isolation Without an MMU

ACM Queue paper explains how CHERIoT uses CHERI hardware capabilities to give microcontroller-class IoT devices memory and privilege isolation without an MMU.

The ACM Queue article (DOI 10.1145/3831361) describes CHERIoT, a RISC-V-derived platform that scales CHERI capability-based hardware down to small embedded and IoT microcontrollers. It provides strong, fine-grained isolation and memory safety without a memory management unit, aiming to make compartmentalization practical for low-cost devices. The piece emphasizes usability of the isolation model alongside its security guarantees.

Lobsters · security·Sep 10, 14:59 UTC · 6d agoResearch

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Grouped Value Attention: Efficient KV Caching via On-Demand Key Reconstruction

Grouped Value Attention stores grouped values and reconstructs content keys via a learned linear map, cutting KV-cache size about 45-47% versus GQA.

GVA stores only grouped values and reconstructs content keys with a learned linear map absorbed into the query at decode time, while a small shared decoupled RoPE channel preserves positional information via a separately cached positional key. At 350M parameters trained on 30B FineWeb-Edu tokens, the 16-dimensional positional variant scores 44.18 average accuracy across five tasks versus 44.36 for GQA and 43.88 for MLA. Custom decoding kernels are in development with an open-source release planned.

Hugging Face daily papers·Sep 7, 20:00 UTC · 9d agoAI research

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Hardware Fingerprinting FTQC via Quantum Decoder Timing

Quantum decoder timing on IBM Heron processors forms a side channel enabling device fingerprinting with 89% accuracy and workload inference.

The work demonstrates that wall-clock syndrome-decoding times on fault-tolerant quantum computers constitute a novel hardware side channel. Using per-shot decoder timings from three IBM Heron processors collected over 68 days, a passive observer can reconstruct detector-firing distributions, estimate logical error rate, infer code distance, and fingerprint the specific device with up to 89% accuracy versus 33% for random guessing. Noisy simulation based on Google's 105-qubit Willow processor distinguishes nine surface-code patches at 81% accuracy, showing the channel persists across vendors and code families.

arXiv cs.CR·Sep 10, 19:24 UTC · 6d agoResearch

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BeaconKV: Key-Value Cache Compression Guided by Beacon Queries for Efficient Large Reasoning Model Inference

BeaconKV introduces training-free KV cache compression using beacon queries, cutting long-reasoning inference memory up to 5.8x while preserving accuracy.

The paper shows recency-based KV cache compression assumptions fail in long-horizon reasoning because Thought Revisiting Tokens (TRT) re-attend to distant context such as early task-solving plans. TRT queries cluster into a small number of similarity groups, which BeaconKV exploits by maintaining compact beacon query representatives to anticipate revisited KV pairs without storing full query history. The training-free method achieves up to 5.8x memory reduction and over 4.3x throughput improvement across four open-source large reasoning models while nearly preserving full cache accuracy.

Hugging Face daily papers·Sep 3, 20:00 UTC · 13d agoAI research1

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Does Your Agent's Memory Survive a Model Upgrade? A Controlled Study of Memory Portability

A controlled study finds agent memory portability varies sharply: fixed-schema knowledge graphs survive model swaps while compressed notes degrade.

The study compares preserving an agent's history as raw long context, RAG chunks, compressed natural-language notes, or fixed-schema knowledge graphs across model upgrades, using 48 synthetic histories and two open-weight sub-10B-parameter models. Fixed-schema KG accuracy changed by only +0.0004 ± 0.0020 after a writer swap, while compressed NOTES shifted asymmetrically by +9.91 or -13.28 percentage points depending on migration direction. Mixed 50/50 embedding migrations captured only 4.96 of an 11.90-point RAG re-embedding gain; 80% of the NOTES deficit came from information lost at construction, and 81% of the RAG deficit from retrieval failures. Store-only repair of NOTES failed to reach 90% recovery in all 48 cases, while retaining raw histories enabled recovery in 34 of 48 for one direction.

arXiv cs.AI / cs.LG / cs.CL·Sep 4, 16:44 UTC · 12d agoAI research1

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Domain-Incremental Learning for Multi-Channel Replay Speech Detection

First continual learning benchmark for multi-channel replay speech detection shows task-specific beamforming cuts catastrophic forgetting across 24 acoustic environments.

Researchers frame replay-attack detection for voice-controlled systems as domain-incremental learning over acoustic environments, evaluating a beamformer-based detector across all 24 environment orderings of the ReMASC corpus with five seeds. Naive sequential fine-tuning raises error rates on previously learned environments by 18.8 points, while elastic weight consolidation halves forgetting but loses plasticity and gradient projection memory is statistically indistinguishable from naive fine-tuning. A task-specific beamformer keeping one spatial front-end per environment significantly improves final and incremental accuracy, and the last environment in a sequence dominates final performance.

arXiv cs.CR·Sep 10, 08:03 UTC · 6d agoResearch1

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Mask Forcing: Improving Autoregressive Video Diffusion Distillation via Dual-Noise Masking Rollout

Researchers propose Mask Forcing, a dual-noise masking rollout that mitigates mode collapse in autoregressive video diffusion distillation.

The paper targets over-saturation and over-smoothing in autoregressive video diffusion models distilled via Distribution Matching Distillation, attributed to reverse-KL mode-seeking behavior. Mask Forcing perturbs the student self-rollout with random masks along spatial and temporal axes, injecting cleaner tokens that act as denoising guidance for noisier tokens. Experiments show improved visual quality across multiple distillation methods without using real video data or extra post-training stages.

Hugging Face daily papers·Sep 7, 20:00 UTC · 9d agoAI research

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