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Why Scaling AI Compute Performance Requires a New Power Architecture

NVIDIA argues AI factories need 800 VDC power distribution as dense GPU racks outgrow traditional AC-based delivery.

NVIDIA's blog contends each generation of accelerated computing demands higher rack density and more efficient, scalable power distribution. It frames the bottleneck as how power moves from the grid to the GPU rather than raw wattage, and describes limitations of traditional AC power delivery. NVIDIA advocates a new 800 VDC power architecture for AI factories.

NVIDIA Blog · Aug 11, 2026AI industry

Scalability Analysis of Distributed Kolmogorov-Arnold Network Training on High-Performance Computing Systems

An empirical study shows distributed Kolmogorov-Arnold Network training reaches 74.7% parallel efficiency at 8 A100 GPUs, with overheads driven by All-Reduce choices.

The study evaluates data-parallel Kolmogorov-Arnold Network (KAN) training on the FinisTerrae III supercomputer using up to 8 NVIDIA A100 GPUs across 4 nodes with PyTorch Distributed Data Parallel. Strong scaling yields 5.97x speedup and 74.7% parallel efficiency at 8 GPUs, comparable to conventional deep learning workloads, while communication overhead ranges from 1.3% to 6.1%, driven mainly by All-Reduce algorithm selection and inter-node latency rather than KAN's edge-wise gradient structure. Weak scaling shows an initial single-to-multi-GPU throughput drop followed by stability, and the parameter-to-memory ratio improves with model size even as training time scales unfavorably. The authors provide GPU topology and model-size deployment guidelines for KAN training.

arXiv cs.AI / cs.LG / cs.CL · 8d agoAI research1

Towards Standardized Evaluation of GPU Memory Safety with GMSBench

GMSBench provides 149 CUDA tests covering spatial, temporal, and concurrency GPU memory errors, exposing detection gaps in Compute Sanitizer.

GMSBench is a GPU memory safety benchmark comprising 149 self-contained CUDA tests spanning spatial, temporal, and concurrency errors across different GPU memory spaces and execution scenarios. The authors evaluate NVIDIA's Compute Sanitizer across multiple GPU architectures using the suite, exposing gaps in its detection coverage. The benchmark offers a standardized foundation for comparative evaluation of GPU memory safety mechanisms.

arXiv cs.CR · 8d agoResearch

OPEN-1B: A Fully Auditable Training Run

Open-1B releases a 1B-parameter model with bitwise-reproducible training, letting independent auditors verify every step of the run on commodity hardware.

The paper introduces a 'fully auditable' tier of model transparency: every training operation is reproducible with bitwise certainty on heterogeneous commodity hardware by imposing definite ordering on GPU kernel reductions, data batch ordering, and collective communication. Because replaying a full run on one machine is infeasible, a collective verification scheme lets many independent auditors certify individual steps covering the whole run. The authors release Open-1B with its full pretraining dataset, every intermediate checkpoint, the training codebase, and an audit harness. This rules out undisclosed data, injected biases, or backdoors that proof-of-learning or proof-of-training-data techniques cannot exclude.

arXiv cs.AI / cs.LG / cs.CL · 23h agoAI research

Implementation of Machine Learning Workflows with NVIDIA cuML, RAPIDS, GPU Benchmarking, Explainability, Clustering, and Model Inference

Hands-on tutorial implements NVIDIA cuML and RAPIDS to GPU-accelerate scikit-learn-style ML workflows with benchmarking, clustering, and inference.

The tutorial demonstrates NVIDIA cuML as a GPU-accelerated machine learning framework, using cuml.accel to speed up unmodified scikit-learn scripts with zero code changes and the native cuML API for CuPy/cuDF interoperability. It benchmarks CPU versus GPU implementations of PCA, K-Means, nearest-neighbor search, logistic regression, random forests, and DBSCAN on datasets up to 200,000 samples with 64 features. It also builds GPU pipelines with UMAP, t-SNE, and HDBSCAN, validates GPU-generated SHAP explanations, uses the FIL library for forest inference, and covers model serialization and GPU/CPU portability.

MarkTechPost · 3d agoAI tools & infra

FlashVector: Agent for Hierarchical Model Serving Stack Optimization

FlashVector agent optimizes all layers of Unity's ad-serving stack, delivering up to 2x model-server throughput and 1.98x latency speedup in production.

FlashVector is an agentic system that optimizes performance across GPU kernels, ML framework computation graphs, model servers, and on-demand feature processing. Deployed in Unity's Vector advertising platform, it achieved up to 2x model-server throughput increase, 1.98x latency speedup, and 1.6x feature-store throughput gain. Optimizations spanned NVIDIA Triton's C++ codebase and the Python feature transformation service, demonstrating extensibility beyond single-kernel tuning.

arXiv cs.AI / cs.LG / cs.CL · 23h agoAI research

From Megawatts to Tokens: How NVIDIA Maximizes AI Factory Production

NVIDIA detailed DSX power-management results: Lambda gained 24% token throughput at fixed power, and an AI factory auto-shed 1MW via Emerald AI's grid program.

NVIDIA says Lambda's first validation of DSX MaxLPS on HGX B200 servers ran 19 nodes within a 16-node power budget, lifting cluster token throughput 24% (roughly 4M to 5M tokens/second) and improving performance per watt by 23%. NVIDIA projects DSX MaxLPS can enable up to 40% more GPU capacity for Vera Rubin NVL72 factories within the same megawatt budget. Emerald AI's Conductor platform, running at NVIDIA's Eos factory with Silicon Valley Power, responded to over 200 utility demand signals, automatically dropping power from 4MW to 3MW without interrupting priority workloads. The first dedicated DSX Flex commercial deployment is planned at a 96-megawatt Manassas, Virginia facility.

NVIDIA Blog · 22h agoAI industry

GPU-CFR: 80x Faster Counterfactual Regret Minimization by Compiling the Game to Static Dataflow and CUDA Graph Replay

GPU-CFR compiles counterfactual regret minimization into static dataflow with CUDA Graph Replay, achieving 29.8-80.4x speedups over prior GPU solvers.

The paper presents a compiler and runtime that turns any fixed game's CFR iteration into a static dataflow graph of flat arrays and precomputed indices, cutting framework operations by up to 18.1x. Because shapes and buffer addresses never change, CUDA Graph Replay records the iteration once and replays it with a single launch. On one A100 across an eight-game suite, GPU-CFR runs 29.8-80.4x faster than the fastest prior GPU CFR and 14-258x faster than the CPU implementation LiteEFG on the four largest games, while reproducing reference iterates bitwise on CPU.

arXiv cs.AI / cs.LG / cs.CL · 5d agoAI research3· 1 read

Design Docs Are All You Need: An AI-native Machine-Learning Performance Tool

Researchers present SMART, an ML performance-modeling library regenerated by AI coding agents from natural-language design docs instead of code.

The paper describes SMART, a symbolic performance-modeling library whose main branch contains almost no code: the repository is a DAG of self-contained design documents, and coding sub-agents regenerate implementations from only the docs on version updates. Reliability rests on a worked-example doc style used as in-context demonstrations and a minimal operator IR with SymPy cost expressions, offering both fast analytical roll-up and fine-grained modulo-scheduling modes. Regenerated implementations reproduce hand-audited reference models, including DeepSeek-V3 serving on a TPU pod slice, to round-off precision.

arXiv cs.AI / cs.LG / cs.CL · 11d agoAI research1

Hoss: Fast Oblivious Semantic Search with Heterogeneous GPU-CPU-TEE Architecture

Hoss uses heterogeneous GPU-CPU TEEs for oblivious semantic search, achieving up to 67x speedup over the Compass ORAM-based system.

Hoss is a first-of-its-kind oblivious semantic search system built on a heterogeneous CPU-GPU TEE architecture, hosting hot-path HNSW graph traversal in large GPU TEE private memory and offloading lower graph layers to CPU TEEs. It invokes oblivious primitives only for lower-layer accesses and adds host-access ORAM and data-dependent optimizations. Benchmarked against prior state-of-the-art Compass, the prototype achieves up to 67x speedup while maintaining high recall, with larger gains at scale.

arXiv cs.CR · 12d agoResearch

NVIDIA NVLink Fusion Expands With NVHBM Custom High-Bandwidth Memory

NVIDIA expands NVLink Fusion with NVHBM custom high-bandwidth memory for hyperscalers building trillion-parameter and agentic AI infrastructure.

NVIDIA announced that NVLink Fusion will expand to support NVHBM, a custom high-bandwidth memory option. The offering targets hyperscalers and AI innovators building next-generation systems where agentic AI and trillion-parameter workloads are mainstream. NVIDIA frames the announcement around co-designing compute, memory, storage, networking, and software as a unified system.

NVIDIA Blog · 20d agoAI industry

A Three-Layer Caching Architecture for Low-Latency LLM Web Search on Commodity CPU Hardware

OreoLook's three-layer Redis caching architecture cuts redundant LLM calls and embedding work for CPU-hosted web-search answer generation.

The paper describes a three-layer caching architecture for OreoLook (formerly lixSearch), an open-source LLM answer engine: a Redis session context window with Huffman-compressed disk overflow, a semantic query cache matching rephrasings via embedding cosine similarity, and a URL embedding cache deduplicating embedding computations. Deployed on a single 8-vCPU Intel Cascade Lake server with 30 Hypercorn workers across three containerized replicas, it achieved an 89.3% aggregate Redis keyspace hit rate, 0.1 ms read latency, and 1.38 MB memory overhead. An LRU eviction daemon migrates idle sessions to disk and rehydrates them for resumption hours or days later.

Hugging Face daily papers · Aug 11, 2026AI tools & infra1

Online Draft Co-Training for Speculative Decoding in Large-Scale, Long-Context RL Post-Training

NVIDIA researchers detail an end-to-end system for online draft co-training that speeds speculative decoding in large-scale long-context RL post-training.

The paper tackles scaling online draft co-training for speculative decoding in RL post-training, where rollout generation dominates cost. It extends packed, load-balanced zigzag ring attention to merge rank-local branch attention with causal main-sequence attention for context parallelism, and introduces TapChannel to transport target features across pipeline-parallel stages without changing the schedule. Experiments show co-trained drafts tracking the policy baseline with substantial rollout and end-to-end speedups up to 122B parameters and strong scaling at 256K tokens.

Hugging Face daily papers · 9d agoAI research

Speculative Decoding in vLLM on AMD GPUs

vLLM benchmarks speculative decoding on AMD Instinct MI300X and MI355X GPUs across five drafting methods including EAGLE-3 and native MTP.

The vLLM project documents draft-and-verify speculative decoding support for AMD GPUs via ROCm, comparing native MTP, Gemma 4 MTP, EAGLE-3, DFlash, and DSpark drafting approaches. Output-token throughput effects varied with drafting method, proposal length, model family, draft checkpoint, workload, and acceptance behavior. The post also covers how to enable each method plus practical tuning and observability considerations.

CHERI-D Reincarnate: efficient multicore CHERI temporal memory safety through allocation reincarnation (draft version)

CHERI-D Reincarnate adds allocation reincarnation to CHERI, quarantining generation IDs instead of memory to cut temporal memory-safety overheads on multicore systems.

The proposal extends CHERI-D temporal memory safety by quarantining exhausted generation IDs rather than memory slots, allowing freed memory immediate reuse through allocation reincarnation. It adds coherent ID caching and multicore support connecting physical coherence events to the virtually addressed ObjID buffer. The design was implemented as a hardware-software co-design across CHERI-Toooba FPGA softcore, QEMU, LLVM/Clang, and CheriBSD. Across evaluated workloads it substantially reduces memory-sweep frequency and quarantine overhead with low performance and hardware cost.

arXiv cs.CR · 6d agoResearch

Benchmark Radar: A Living Database and Search Engine for AI Benchmarks and Evaluation

Benchmark Radar provides a living searchable database of 1,283 AI benchmark records and 12,916 score observations drawn from 37 daily discovery sources.

Benchmark Radar combines daily discovery of benchmark papers, repositories, datasets, and releases from 13 direct connectors and 24 first-party feeds into a searchable catalog with model card mentions and score histories. The catalog contains 1,283 source records drawn from 4 benchmark catalogs plus 12,916 numeric observations on 790 records. The release includes a web dashboard with leaderboard, Pareto frontier of score versus usage, saturation and trend views, daily feeds, a CLI, and reproducible analysis. The paper audits the full catalog and examines benchmark saturation and limits of score comparisons.

Hugging Face daily papers · 6d agoAI research

Architecting memory and storage in the AI era

Analysis argues AI inference shifts data-center bottlenecks to memory and storage, urging balanced compute, memory, storage, and network architecture over raw compute.

MIT Technology Review, citing Tirias Research principal analyst Jim McGregor, argues that AI inference and agentic workloads make data movement the key constraint, elevating memory and storage from background hardware to strategic assets. The piece says RAG and real-time inference require continuous data retrieval and caching that legacy infrastructure cannot support. It frames infrastructure planning as a business decision balancing performance, efficiency, cost, and scalability in healthcare, finance, and customer-facing AI.

MIT Technology Review · AI · 11d agoAI industry

AI Infra Summit: NVIDIA Vera Rubin and DSX Platform Advancements Showcase Energy Efficiencies of Optimizing Tokens Per Watt for AI Factories

At AI Infra Summit, NVIDIA showcased Vera Rubin and DSX gains up to 1.4x tokens per megawatt, plus Annapurna, d-Matrix, and Pinterest partnerships.

Ian Buck's AI Infra Summit keynote before 8,000+ attendees emphasized validated agentic tokens per megawatt as the emerging AI infrastructure metric. Announcements include Amazon's Annapurna Labs collaborating on NVHBM custom high-bandwidth memory, d-Matrix integrating NVLink Fusion with Raptor XPUs, and Pinterest using Blackwell plus Dynamo inference software for conversational visual discovery. Lambda reported 23% better performance per watt with DSX MaxLPS on Blackwell servers, running 19 nodes on a 16-node power budget. NVIDIA says DSX MaxLPS combined with Groq 3 LPX on Vera Rubin NVL72 targets up to 35X token throughput per megawatt versus GB200 NVL72 for 2-trillion-plus-parameter models.

NVIDIA Blog · 22h agoAI industry

Graph Machine: Towards Better Pretraining via Edges

Researchers propose Graph Machine, an O(n)-state sparse architecture that replaces 75% of Qwen3-0.6B dense layers with only slight loss change.

The paper introduces the Graph Machine (GM), an architecture that maintains an O(n)-sized state accessed through sparse, dynamic routing via pointer-like edges updated differentiably by a referral mechanism resembling pointer chasing. The authors replaced 75% of dense Transformer layers in Qwen3-0.6B with GM sparse layers and pretrained from scratch on 15.7B tokens. Retrieving 2 of 4,096 tokens per KV head in each sparse layer degrades loss only slightly, while retrieving 4 marginally improves loss over the dense baseline.

Hugging Face daily papers · 14d agoAI research

How much of a problem is AI’s water use?

Analysis finds AI's water footprint growing, with data-center location and cooling technology largely determining the local environmental impact.

The article examines the growing water consumption of AI data centers and argues that real-world impact varies significantly depending on where facilities are sited and which cooling technology they use. It is a contextual analysis of AI's environmental footprint rather than news of a specific incident, breach, or release.

Ars Technica · AI · 20d agoAI industry

Delivering Vera: NVIDIA’s First CPU Built for Agents Is Shipping Now

NVIDIA's Vera CPU, its first processor built for AI agents, is now shipping at scale to partners across the AI ecosystem.

NVIDIA announced that Vera, its first CPU designed specifically for agentic AI workloads, has begun shipping at scale. Vice President of Hyperscale and HPC Ian Buck is hand-delivering early Vera CPU systems to organizations across the AI ecosystem, signaling full production availability of the data-center processor.

NVIDIA Blog · 20d agoAI industry

Up to 30x More Work Per Watt: NVIDIA Vera Rubin NVL72 Sets a New Efficiency Standard for AI Agents

NVIDIA claims Vera Rubin NVL72 delivers up to 30x more work per watt, citing OpenRouter data that agentic workloads use 15x more tokens than chat.

NVIDIA positions the Vera Rubin NVL72 as a new efficiency standard for AI agents, claiming up to 30x more work per watt. The company cites OpenRouter data showing agentic AI workloads consume 15x more tokens than a simple chat request, using a financial-research agent example that spawns sub-agents and multiple tool calls. The piece is largely a product efficiency narrative rather than independent benchmarking.

NVIDIA Blog · 23d agoAI industry

Microsoft’s Project Zenith puts large AI models directly on developer PCs

Microsoft's Project Zenith delivers a ready-to-code Windows 11 experience running 30B+ parameter AI models locally on 64GB+ unified-memory PCs, starting with AMD Ryzen AI Halo.

Project Zenith is a preconfigured Windows 11 developer experience for PCs with at least 64 GB of unified memory and 250 GB/s or higher memory bandwidth, capable of running AI models with more than 30 billion parameters locally without metered cloud tokens. First systems are powered by AMD Ryzen AI Halo, with additional OEM and silicon partner devices expected in coming months. The environment ships with WSL and Linux containers, pinned developer tools, and day-one AI agent security features including OS-enforced agent identity and containment through Microsoft Execution Containers (MXC).

Help Net Security · 8d agoAI industry1

Import AI 470: No rights for machines; automating environment generation with SPADE; and building better GPU kernels with Hawkeye

METR analysis finds AI accelerating cyber vulnerability discovery, while SPADE self-play environment generation improves Qwen3 reasoning benchmark scores at 30B scale.

Import AI 470 discusses a METR research note reporting differential acceleration from AI: major acceleration in reported cyber vulnerabilities (cURL, OpenSSL, Firefox, Microsoft, NVD, OSV), minor acceleration in mathematics, and no measurable acceleration in AI-research optimization benchmarks. It also covers SPADE, a self-play framework from a multi-university team (University of Washington, Stanford, MIT, CMU, and others) that co-evolves executable training environments and agent capability using Environment Designer and Reasoning Agent roles with hint-based regret rewards. Trained on Qwen3-4B-Instruct-2507, Qwen3-8B, and Qwen3-30B-A3B-Instruct-2507 via GRPO (400 rollouts of 25 environments), SPADE lifted the 30B-A3B game-environment suite average to 58.3, +8.1 over base, and improved tool-use results across backbones. The issue also references Hawkeye for building better GPU kernels.

Import AI · 23d agoAI research

Perplexity Portable Computer Is Now Available on Windows, Powered by NVIDIA RTX

Perplexity launches Portable Computer local AI agent on Windows for NVIDIA RTX PCs with 24GB+ VRAM, keeping sensitive work on-device.

Perplexity released Portable Computer, a local version of its agentic Perplexity Computer, in its Windows app for NVIDIA GeForce RTX PCs and RTX PRO Workstations with 24GB or more VRAM. It runs a locally post-trained model such as Qwen 3.8 27B optimized for NVIDIA RTX GPUs, handling multistep tasks and file analysis on-device with a SPACE sandbox and built-in browser. Connectors cover Outlook, OneDrive, Word, Google Drive, Gmail, Slack, and GitHub, and the agent can escalate to cloud models only with user permission.

NVIDIA Blog · 2d agoAI industry

PHAT: PHotonic Accelerator for TFHE

PHAT photonic accelerator using optically addressed phase-change memory speeds TFHE bootstrapping FFTs 2.14x-5.10x over the prior ASIC accelerator.

Researchers propose PHAT, an electro-photonic accelerator for TFHE fully homomorphic encryption built on optically addressed phase-change memory (OPCM) processing-in-memory. The architecture adds OPCM-based FFT units, a twiddle-stationary dataflow, and a scheduling mechanism to maximize FFT utilization for TFHE bootstrapping. It achieves 2.14x-5.10x speedups across four real-world TFHE workloads versus the state-of-the-art ASIC accelerator, improving feasibility of privacy-preserving computation in the cloud.

arXiv cs.CR · 6d agoResearch

FreeFlow: A Bias-free Hierarchical Transformer for Optical Flow Estimation

FreeFlow is a bias-free hierarchical transformer achieving state-of-the-art optical flow results on Sintel, KITTI-2015, and Spring benchmarks.

FreeFlow replaces task-specific inductive biases like correlation volumes and iterative warping with a single feed-forward encoder-decoder combining window, shifted-window, and reduced-resolution global attention. It reaches 0.68/1.48 EPE on Sintel Clean/Final, 3.23 Fl-all on KITTI-2015, and 3.192 1px on Spring. The architecture scales consistently from small to large variants and remains memory efficient at 1080p inference.

Hugging Face daily papers · 6d agoAI research

Hardware Fingerprinting FTQC via Quantum Decoder Timing

Quantum decoder timing on IBM Heron processors forms a side channel enabling device fingerprinting with 89% accuracy and workload inference.

The work demonstrates that wall-clock syndrome-decoding times on fault-tolerant quantum computers constitute a novel hardware side channel. Using per-shot decoder timings from three IBM Heron processors collected over 68 days, a passive observer can reconstruct detector-firing distributions, estimate logical error rate, infer code distance, and fingerprint the specific device with up to 89% accuracy versus 33% for random guessing. Noisy simulation based on Google's 105-qubit Willow processor distinguishes nine surface-code patches at 81% accuracy, showing the channel persists across vendors and code families.

arXiv cs.CR · 5d agoResearch

Wazuh and AI For Enhanced SOC Workflows

Wazuh details AI-powered SOC workflows via its AI Analyst, self-hosted Llama 3 via Ollama, and Claude 3.5 Haiku integrations.

Wazuh outlines how AI can augment SOC analysts handling high alert volumes. The Wazuh AI Analyst on Wazuh Cloud uses Amazon Bedrock and Anthropic Claude to generate scheduled security posture reports. Self-hosted options include Llama 3 with Ollama, FAISS, and LangChain for privacy-sensitive threat hunting, plus an OpenSearch Assistant integration with Claude 3.5 Haiku. This is a vendor-contributed piece describing product capabilities rather than an incident or vulnerability.

The Hacker News · 26d agoTools

Arm Mali G2-Ultra NX GPU: desktop-class mobile gameplay with AI-native graphics

Arm unveiled Mali G2-Ultra NX, its first AI-native mobile GPU with in-shader neural acceleration, third-gen ray tracing, and up to 24% higher benchmark performance.

Arm announced the Mali G2-Ultra NX, the first AI-native Mali GPU, integrating neural accelerators directly into shader cores alongside a new execution engine and third-generation hardware ray tracing. It introduces Neural Super Sampling (NSS), Neural Frame Rate Upscaling (NFRU), and Neural Super Sampling and Denoising (NSSD); the Neural Dawn demo with Sumo Digital showed up to 4x performance efficiency and 70% lower external memory traffic versus native rendering. Arm claims up to 24% higher benchmark performance, 13% lower DRAM traffic on ray tracing benchmarks, and up to 120 FPS with NFRU. Over 14 billion Mali GPUs have shipped to date.