Search: “optical-interconnects”

PHAT: PHotonic Accelerator for TFHE

PHAT photonic accelerator using optically addressed phase-change memory speeds TFHE bootstrapping FFTs 2.14x-5.10x over the prior ASIC accelerator.

Researchers propose PHAT, an electro-photonic accelerator for TFHE fully homomorphic encryption built on optically addressed phase-change memory (OPCM) processing-in-memory. The architecture adds OPCM-based FFT units, a twiddle-stationary dataflow, and a scheduling mechanism to maximize FFT utilization for TFHE bootstrapping. It achieves 2.14x-5.10x speedups across four real-world TFHE workloads versus the state-of-the-art ASIC accelerator, improving feasibility of privacy-preserving computation in the cloud.

arXiv cs.CR·Sep 10, 14:30 UTC · 5d agoResearch

Hardware Fingerprinting FTQC via Quantum Decoder Timing

Quantum decoder timing on IBM Heron processors forms a side channel enabling device fingerprinting with 89% accuracy and workload inference.

The work demonstrates that wall-clock syndrome-decoding times on fault-tolerant quantum computers constitute a novel hardware side channel. Using per-shot decoder timings from three IBM Heron processors collected over 68 days, a passive observer can reconstruct detector-firing distributions, estimate logical error rate, infer code distance, and fingerprint the specific device with up to 89% accuracy versus 33% for random guessing. Noisy simulation based on Google's 105-qubit Willow processor distinguishes nine surface-code patches at 81% accuracy, showing the channel persists across vendors and code families.

arXiv cs.CR·Sep 10, 19:24 UTC · 5d agoResearch

Five Eyes Guidance Improve Edge

Five Eyes intelligence agencies issued joint guidance aimed at improving security of edge network devices.

Based on the headline, Five Eyes cyber agencies released guidance recommending organizations improve the security posture of edge devices such as routers and remote-access appliances. No article text is available, so specific recommendations are unavailable.

Infosecurity Magazine·Aug 19, 00:00 UTC · 28d agoAdvisory

Deep Learning-Based Detection of Electrical Faults and Power Quality Disturbances in Aerospace Power Systems

Compact ResNet detects electrical faults in 400 Hz aircraft power systems with 95.87 percent accuracy after deployment on Xilinx Zynq MPSoC.

The study targets multiclass fault and power quality disturbance detection in 400 Hz aerospace networks using a high-fidelity simulation model inspired by the Boeing 787 electrical architecture, covering 21 normal, disturbance, switching, open-circuit, and short-circuit conditions. Two 73,500-sample datasets are built from 1D waveforms and STFT time-frequency representations, augmented with domain randomization and class-specific GANs, and the time-series dataset is released via IEEE DataPort. A compact ResNet with 175,685 parameters achieved 96.94 percent software test accuracy, and 95.87 percent after 8-bit quantization on a Xilinx Zynq UltraScale Plus ZCU102 with 6.90 ms mean accelerator latency per record.

arXiv cs.AI / cs.LG / cs.CL·Sep 9, 17:19 UTC · 6d agoAI research

Chinese-Made Zbtlink Routers Ship With Backdoor That Opens Unauthenticated Root Shells

The Hacker News·Aug 8, 05:46 UTC · Aug 8, 2026Malware

FreeFlow: A Bias-free Hierarchical Transformer for Optical Flow Estimation

FreeFlow is a bias-free hierarchical transformer achieving state-of-the-art optical flow results on Sintel, KITTI-2015, and Spring benchmarks.

FreeFlow replaces task-specific inductive biases like correlation volumes and iterative warping with a single feed-forward encoder-decoder combining window, shifted-window, and reduced-resolution global attention. It reaches 0.68/1.48 EPE on Sintel Clean/Final, 3.23 Fl-all on KITTI-2015, and 3.192 1px on Spring. The architecture scales consistently from small to large variants and remains memory efficient at 1080p inference.

Hugging Face daily papers·Sep 9, 20:00 UTC · 6d agoAI research

How Fragile Is Safety Alignment at Frontier Scale? A Single-Direction Attack on a 320B MoE

Researchers show directional ablation breaks refusal in GLM-5.3-Flash, a 320B-parameter MoE, cutting refusal by 41–89 points across seven benchmarks.

The study extends directional ablation, a white-box attack that removes an aligned LLM's refusal behavior, from dense models up to ~70B parameters to GLM-5.3-Flash, a 320B-parameter mixture-of-experts model with 288 routed experts, four-wide hyper-connection residual, and block-FP8 quantization. Editing attention, dense, and routed-expert writers jointly removes 0.776 of refusal, with 74% of the effect existing only under the joint intervention; the conventional module-name-based recipe reaches only 0.066 and fails silently on MoE architectures. The attack yields 41–89 percentage-point reductions in refusal across seven harmful benchmarks with no detected capability change, and a category-concentrated refusal residue survives all edits at ranks 1 to 12.

arXiv cs.CR·Sep 9, 06:48 UTC · 7d agoAI safety & security

SNAP3D: Physically Grounded 3D Parts for Assembly from a Single Image

SNAP3D uses physics simulation feedback to make single-image 3D part generation produce valid, stable assemblies, validated through 3D printing.

The framework improves part-aware 3D generation by resolving inter-part penetration, recovering contact graphs between neighboring parts, and placing parameterized connectors at contact surfaces. Physical simulation feedback refines connector placement, orientation, and dimensions to improve assembly stability while preserving geometry. A physics-based evaluation protocol tests assembly validity and stability under gravity, and results are validated through 3D printing and real-world assembly.

Hugging Face daily papers·Sep 10, 20:00 UTC · 5d agoAI research

Testing race conditions with memory access tracing and stack-based delay injection

Google Project Zero released MAccConc, Linux kernel tooling that traces memory accesses to explore and test race condition interleavings.

A Google Project Zero researcher published MAccConc (Memory Access Concurrency), tooling for exploring possible interleavings of multithreaded test cases in the Linux kernel, available on GitHub. The tools use KCOV with ASAN outline-mode instrumentation to record per-access memory traces, enabling automatic testing of all A-B-A interleavings plus terminal and GUI explorers for manual analysis. The work targets confirming race condition candidates, building reliable regression tests, and enabling concurrency fuzzing, drawing on ideas from SKI and Ned Williamson's sockfuzzer.

Google Project Zero·Sep 8, 07:00 UTC · 8d agoResearch1

From Megawatts to Tokens: How NVIDIA Maximizes AI Factory Production

NVIDIA detailed DSX power-management results: Lambda gained 24% token throughput at fixed power, and an AI factory auto-shed 1MW via Emerald AI's grid program.

NVIDIA says Lambda's first validation of DSX MaxLPS on HGX B200 servers ran 19 nodes within a 16-node power budget, lifting cluster token throughput 24% (roughly 4M to 5M tokens/second) and improving performance per watt by 23%. NVIDIA projects DSX MaxLPS can enable up to 40% more GPU capacity for Vera Rubin NVL72 factories within the same megawatt budget. Emerald AI's Conductor platform, running at NVIDIA's Eos factory with Silicon Valley Power, responded to over 200 utility demand signals, automatically dropping power from 4MW to 3MW without interrupting priority workloads. The first dedicated DSX Flex commercial deployment is planned at a 96-megawatt Manassas, Virginia facility.

NVIDIA Blog·Sep 15, 16:55 UTC · 17h agoAI industry

Rockwell Automation 1756-ENBT Module

Rockwell's 1756-ENBT ControlLogix EtherNet/IP bridge (all versions) is vulnerable to DoS via crafted CIP packets, crashing the module until manual restart.

CISA republished Rockwell Automation's advisory for CVE-2025-10478, a CWE-754 flaw affecting all versions of the 1756-ENBT ControlLogix EtherNet/IP bridge, scored CVSS 7.5. A crafted CIP packet can crash the module, and the device requires a restart to recover. Affected critical infrastructure sectors include critical manufacturing, food and agriculture, transportation systems, and water. No public exploitation has been reported; CISA recommends minimizing network exposure.

CISA Advisories·Sep 3, 12:00 UTC · 12d agoAdvisory 3 sourcesCVE-2025-10478

3D Point Splatting for mmWave Radar Novel View Synthesis

Researchers propose 3DPS, a differentiable point renderer for mmWave radar novel view synthesis that outperforms optical-NVS baselines by 1.7x-5.2x.

The paper introduces 3D Point Splatting (3DPS), the first differentiable point renderer for radar, derived from the solid-angle form of the radar equation with ITU-R P.2040 material models and complex phasor splatting. On six outdoor ColoRadar scenes it reaches 0.587 mean Pearson correlation on held-out range-azimuth images, between 1.7x and 5.2x the RadarSplat, Radar Fields, and DART baselines. The same optimized scene produces ADC, complex range profile, and RA outputs via standard FFT pipelines, and training takes about 3 minutes per scene on an RTX 4090.

arXiv cs.AI / cs.LG / cs.CL·Sep 10, 17:52 UTC · 5d agoAI research

The Pelican comparison grid for Astra is pretty interesting

Simon Willison's pelican SVG comparison shows GPT-6 Astra producing markedly better images than GPT-5.6 Sol, Terra, and Luna across reasoning levels.

Willison generated pelicans-riding-bicycles SVGs with newly accessed GPT-6 Astra at low through max reasoning levels and rendered them in a comparison grid against GPT-5.6 Sol, Terra, and Luna. Astra's outputs were markedly more coherent, while even the best GPT-5.6-Sol images remained largely abstract shapes. Astra does not support a reasoning=none setting, so all comparisons involved reasoning-enabled runs.

Simon Willison·Sep 4, 23:59 UTC · 11d agoAI research

Proximity Gaps for Gabidulin Codes and Applications

Researchers prove proximity-gap bounds for rank-metric and Gabidulin codes, enabling the first polynomial commitment scheme framework based on rank-metric error-correcting codes.

The paper proves every linear rank-metric code admits a proximity gap for deltas up to (d-1)/(3n) with error at most q^(e+1)/q^m, and improves the gap to (d-1)/(2n) for Gabidulin codes with error at most 10q^(n-1)/q^m, matching bounds for Reed-Solomon codes. A constructed infinite family of constant-rate Gabidulin codes shows the (d-1)/(2n) bound is tight, and a counterexample establishes a lower bound on the error at the d/(3n) gap. Applications include an IOPP for interleaved Gabidulin codes adapted from the Ligero IOPP and a q-linearized polynomial commitment scheme adapted from Ligero-based PCS, reportedly the first PCS framework based on rank-metric codes.

arXiv cs.CR·Sep 9, 07:45 UTC · 7d agoResearch

Injected and Leaked: Actively Inducing Side-Channel Leakage Using Electromagnetic Injection and Hardware Nonlinearity

Researchers introduce InjectEave, using electromagnetic injection and hardware nonlinearity to induce side-channel leakage and eavesdrop on headphone audio from 30 meters.

An arXiv paper shows electromagnetic injection can actively amplify side-channel leakage: nonlinear hardware such as amplifiers, ADCs, and power converters modulates secret electrical signals onto an injected EM carrier, upconverting low-frequency secrets into measurable EM emissions. By tuning injection frequency and amplitude, an adversary can shape the effective spectrum and entropy of the resulting leakage. The InjectEave attack demonstrated eavesdropping on wired and wireless headphone audio from up to 30 meters and in through-wall scenarios using accessible RF equipment, plus leakage of smart home device power consumption and analog sensor inputs. Case studies show closed-loop eavesdropping and manipulation of landline phone conversations, and the paper discusses mitigations.

arXiv cs.CR·Sep 4, 06:22 UTC · 12d agoResearch

How XPUs Meet a World-Class AI Factory

NVIDIA argues AI factories with custom XPUs and NVLink Fusion connectivity must optimize tokens-per-second, tokens-per-watt, cost and uptime.

NVIDIA published a blog explaining that AI factories running continuously are economically defined by delivered output: tokens per second, tokens per watt, cost per token, utilization and uptime. It argues hyperscalers and AI-native companies building custom XPUs need infrastructure designed as a complete factory rather than collections of individual accelerators. The piece promotes NVIDIA's NVLink Fusion and full-stack XPU connectivity as the foundation for such world-class AI factory builds.

NVIDIA Blog·Aug 24, 15:00 UTC · 22d agoAI industry

How CHERIoT Provides Strong and Usable Isolation Without an MMU

ACM Queue paper explains how CHERIoT uses CHERI hardware capabilities to give microcontroller-class IoT devices memory and privilege isolation without an MMU.

The ACM Queue article (DOI 10.1145/3831361) describes CHERIoT, a RISC-V-derived platform that scales CHERI capability-based hardware down to small embedded and IoT microcontrollers. It provides strong, fine-grained isolation and memory safety without a memory management unit, aiming to make compartmentalization practical for low-cost devices. The piece emphasizes usability of the isolation model alongside its security guarantees.

Lobsters · security·Sep 10, 14:59 UTC · 5d agoResearch

New hardware device can RAM into encrypted memory, expose your data

Researchers built a $200 DDR5 interposer that silently drops memory writes to break TDX, SGX, and SEV-SNP confidential VM integrity, requiring physical access.

Researchers from KU Leuven, ETH Zurich, Durham University, and Google demonstrated DDRop, a hardware interposer costing under $200 that corrupts DDR5 bus commands to silently drop writes to encrypted memory, enabling replay attacks on confidential VMs. Because scalable memory encryption lacks freshness checks, protected VMs keep computing on stale attacker-selected data; on an Intel TDX server the attack forces debug mode for plaintext memory reads or forges attestation reports, succeeding in under two minutes without crashing. Intel and AMD both called the attack out of scope for their cloud threat models, with no mitigation planned, and proposed cache line versioning appears still vulnerable. The full interposer design is being released as open-source hardware.

The Register · Security·Sep 14, 18:31 UTC · 1d agoResearch

LLM-Driven Algorithm Design for Quantum Circuit Synthesis based on Binary Decision Diagrams

QuantumEvo uses an LLM to evolve BDD variable-ordering heuristics, achieving a 70.9% tie-or-win rate on quantum circuit cost versus baseline methods.

The QuantumEvo framework uses an LLM as a heuristic generator for quantum-cost-aware BDD variable ordering in reversible circuit synthesis, searching over heuristics initialized from multiple families and selecting them by downstream quantum circuit cost. The discovered heuristic HGA-QE modifies the sifting step inside a genetic algorithm and achieves a 70.9% tie-or-win rate against the per-function best baseline, with strict wins on 13.5% of functions. Advantages are clearer on benchmark suites not used for heuristic discovery.

arXiv cs.AI / cs.LG / cs.CL·Sep 4, 16:25 UTC · 11d agoAI research1

Chaotic Eclipse Released GreenSection, A PoC For NVIDIA Memory Corruption Zero-Day

Researcher Chaotic Eclipse released GreenSection, a PoC exploiting an unpatched out-of-bounds write in NVIDIA Windows user-mode shared memory.

Security researcher Chaotic Eclipse disclosed an out-of-bounds write in NVIDIA's Windows user-mode components, which share a global memory section (\BaseNamedObjects\{52813408-3561-4705-820a-2b3b78be92ba}) with full read/write access to all users. The PoC crashes applications running Vulkan or OpenGL; the researcher says the bug could cross user boundaries or compromise dwm.exe but did not fully assess the impact. No CVE has been assigned and no patch is mentioned. The researcher recently released zero-day PoCs against Kaspersky, Avast, and CrowdStrike Falcon.

Security Affairs·Sep 7, 13:42 UTC · 8d agoExploit / PoC 2 sources

AMD security advisory (AV26-879)

Canadian Centre for Cyber Security advisory AV26-879 lists vulnerabilities across AMD EPYC, Ryzen, Threadripper, Instinct, and embedded processors, urging updates.

The September 3, 2026 advisory states AMD is affected by processor vulnerabilities as of September 2, 2026, spanning 2nd-4th Gen EPYC, Ryzen 3000-7045 series, Athlon, Threadripper, Radeon PRO V620, Instinct MI300A, and embedded product lines. It specifies required microcode package versions for each affected family and encourages users and administrators to review AMD's links and apply updates as they become available.

Canadian Centre for Cyber Security·Sep 3, 15:05 UTC · 12d agoAdvisory

[Control Systems] National Instruments security advisory (AV26-856)

Canada's Cyber Centre relayed National Instruments advisories for memory corruption, out-of-bounds read, and out-of-bounds write flaws in LabVIEW versions.

The Canadian Centre for Cyber Security published control systems advisory AV26-856 covering National Instruments LabVIEW. Affected versions include releases before 23.0.0, 23.3.10, 24.3.7, 25.3.5, and 26.3.1. The flaws include memory corruption, an integer conversion out-of-bounds read, and an integer overflow out-of-bounds write. Users and administrators are urged to review the links and apply NI security updates.

Canadian Centre for Cyber Security·Aug 28, 12:16 UTC · 18d agoAdvisory

d-Matrix Adopts NVIDIA NVLink Fusion for Rack-Scale XPU Deployment

d-Matrix will integrate its Raptor inference XPUs with NVIDIA NVLink Fusion, MGX racks and Spectrum-X networking for rack-scale AI factory deployment.

Inference chipmaker d-Matrix announced adoption of NVIDIA NVLink Fusion to connect its next-generation Raptor XPUs to NVIDIA's scale-up and scale-out networking, MGX rack architecture, and broader AI factory platform. NVIDIA claims 3x lower XPU-to-XPU latency than off-the-shelf Ethernet and 3 TB/s per-XPU all-to-all bandwidth via sixth-generation NVLink. d-Matrix plans to integrate Vera CPUs, ConnectX-9 SuperNICs, BlueField-4 DPUs and Spectrum-X Ethernet, with racks able to work alongside Vera Rubin NVL72 GPU systems. Other NVLink Fusion partners include AWS, Arm, Intel, Fujitsu, Marvell, MediaTek, Samsung and Cadence.

NVIDIA Blog·Sep 10, 13:00 UTC · 5d agoAI industry

CertiFlash: A Formal Verification Framework for Flash Translation Layers in Computational Solid State Drives

CertiFlash provides machine-checked formal verification of SSD flash translation layers, proving isolation, integrity, and ownership invariants to prevent tenant data leaks.

CertiFlash is an open-source formal verification framework for Flash Translation Layers (FTL) in computational SSDs, mechanized in the Rocq proof assistant. It shows that a faulty FTL can corrupt device state at five surfaces (e.g., leaking data between tenants or dropping integrity tags), demonstrated on a DaisyPlus OpenSSD. Designers prove once that every operation of a general FTL model preserves a global invariant covering mapping, isolation, integrity, ownership, and allocation; new designs need only discharge five hypotheses. Across four case studies, added effort was 27-3,231 lines against a 16,489-line framework.

arXiv cs.CR·Sep 9, 15:44 UTC · 6d agoResearch1

Speculative Decoding in vLLM on AMD GPUs

vLLM benchmarks speculative decoding on AMD Instinct MI300X and MI355X GPUs across five drafting methods including EAGLE-3 and native MTP.

The vLLM project documents draft-and-verify speculative decoding support for AMD GPUs via ROCm, comparing native MTP, Gemma 4 MTP, EAGLE-3, DFlash, and DSpark drafting approaches. Output-token throughput effects varied with drafting method, proposal length, model family, draft checkpoint, workload, and acceptance behavior. The post also covers how to enable each method plus practical tuning and observability considerations.

Hacker News · AI·Sep 7, 09:26 UTC · 9d agoAI tools & infraHN 141↑ · 52 comments1

Understanding the Security Boundary of Obfuscation-based On-Device LLM Protection

Researchers formalize obfuscation primitives for TEE-protected on-device LLMs and show a Collapse attack breaks ArrowCloak, TSQP, and LoRO, then extend the boundary.

The paper formalizes obfuscation primitives for TEE-Shielded LLM Partition (TSLP) schemes that offload computationally intensive layers from a Trusted Execution Environment to external GPUs. A novel primitive-guided attack, Collapse, demonstrates a shared vulnerability in prominent published methods including ArrowCloak (Security'25), TSQP (S&P'25), and LoRO (NeurIPS'25). The authors then introduce two new obfuscation primitives and integrate them with existing constructs to formulate an extended security boundary (O_ext).

arXiv cs.CR·Sep 9, 12:51 UTC · 6d agoAI safety & security

AI Infra Summit: NVIDIA Vera Rubin and DSX Platform Advancements Showcase Energy Efficiencies of Optimizing Tokens Per Watt for AI Factories

At AI Infra Summit, NVIDIA showcased Vera Rubin and DSX gains up to 1.4x tokens per megawatt, plus Annapurna, d-Matrix, and Pinterest partnerships.

Ian Buck's AI Infra Summit keynote before 8,000+ attendees emphasized validated agentic tokens per megawatt as the emerging AI infrastructure metric. Announcements include Amazon's Annapurna Labs collaborating on NVHBM custom high-bandwidth memory, d-Matrix integrating NVLink Fusion with Raptor XPUs, and Pinterest using Blackwell plus Dynamo inference software for conversational visual discovery. Lambda reported 23% better performance per watt with DSX MaxLPS on Blackwell servers, running 19 nodes on a 16-node power budget. NVIDIA says DSX MaxLPS combined with Groq 3 LPX on Vera Rubin NVL72 targets up to 35X token throughput per megawatt versus GB200 NVL72 for 2-trillion-plus-parameter models.

NVIDIA Blog·Sep 15, 16:55 UTC · 17h agoAI industry

Marigold V2: Revisiting Diffusion Transformers for Monocular Depth Estimation

Marigold V2 adapts diffusion transformers for monocular depth estimation, improving AbsRel 16-26% over the previous best on KITTI and ETH3D.

Huawei's Bayer lab revisits the Marigold approach to repurpose image generation and editing models built on the diffusion transformer (DiT) architecture into monocular depth estimators. The recipes target single-step inference from pretrained multi-step flow-matching models, with remedies including alignment to ground-truth semantic features and a two-stage fine-tuning protocol using a Sinkhorn-based loss. The resulting model produces crisper depth maps that generalize out-of-distribution and also achieves state-of-the-art results on surface normals estimation and intrinsic image decomposition.

Hugging Face daily papers·Sep 7, 20:00 UTC · 8d agoAI research

Memory-safety defects in the upstream (abandoned) AOSP OpenCORE AAC decoder, shipped unpatched by Samsung TizenRT

Abandoned AOSP OpenCORE AAC decoder has out-of-bounds-write and wild-pointer flaws reachable from attacker-controlled frames, unpatched in Samsung TizenRT.

The OpenCORE AAC decoder in AOSP's abandoned external/opencore tree contains memory-safety defects of the out-of-bounds-write and wild-pointer class. The code is still vendored and built by multiple projects, most notably Samsung's widely deployed TizenRT embedded RTOS. The defects are reachable from untrusted media because an AAC frame is attacker-controlled. The researcher is requesting a CVE ID for the issue.

oss-security·Sep 10, 01:12 UTC · 6d agoVulnerability

Lightweight Vision Transformer Compression for On-Device Plant Disease Detection in Resource-Constrained Agricultural Field Conditions

A unified ViT compression pipeline (H-BAC pruning, quantization, distillation) cuts plant-disease models 54.5x to 6.01 MB while keeping 95.13% accuracy.

Researchers combined Hessian-Balanced Adaptive Block Pruning (H-BAC), guided by second-order sensitivity estimation, with quantization and attention-based knowledge distillation to compress Vision Transformers for on-device chilli plant disease detection in India. On a 3-class cross-village, cross-device out-of-distribution dataset, the integrated pipeline reduced model size from 327.42 MB to 6.01 MB (54.5x) at 95.13 +/- 2.32% accuracy, matching the 95.13% FP32 baseline. Ablations also show a directly trained 6.01 MB INT8 student reaches 94.87% accuracy, indicating where pruning and distillation add limited value.

arXiv cs.AI / cs.LG / cs.CL·Sep 4, 16:40 UTC · 11d agoAI research