GI-RTL-Fuzz finds inconsistencies in major Verilog simulators
Original title: GI-RTL-Fuzz: Grammar-Informed RTL Generation with LLMs for End-to-End Differential Simulator Fuzzing
Grammar-guided LLM generation and differential testing exposed previously unknown linting and simulation mismatches.
GI-RTL-Fuzz uses large language models and Backus-Naur Form grammar coverage to generate RTL test cases for end-to-end differential fuzzing of simulators. The authors say the approach explores complex, rarely tested language features while stressing tools used in IC design. Differential testing against different RTL simulators uncovered previously unknown inconsistencies in linting and simulation results of major Verilog simulators. The abstract does not name the simulators, counts, or fixes.
Unconfirmed: The abstract does not identify the simulators or say vendors confirmed the inconsistencies.
- The framework guides LLM generation with BNF grammar coverage.
- Testing compares results across different RTL simulators.
- Reported issues cover both linting and simulation results.
- The authors describe the inconsistencies as previously unknown.
- No simulator names, versions, or CVE identifiers are given.
From the original article
1 min read at arxiv.orgRegister-Transfer Level (RTL) simulators are fundamental to modern IC design workflows, yet like any complex software, they frequently contain critical bugs that compromise simulation accuracy. To systematically stress-test these tools, we introduce GI-RTL-Fuzz, a grammar-informed fuzzing framework that leverages Large Language Models (LLMs) to generate high-quality RTL test cases.
By Ziyue Zheng · arxiv.org
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