TERMon: Detecting Persistent Behavioral Threats in Edge AI via Hardware-Native Ternary Runtime Monitor
TERMon, an FPGA runtime monitor, flags harmful weight corruption in edge AI using ternary behavioral fingerprints.
TERMon is a lightweight FPGA runtime monitor that fingerprints trusted class-conditional inference behavior as ternary patterns and matches them against a thermometer-encoded trace. On a PYNQ-Z2, the pipelined design uses no block RAM or DSPs and decides in two cycles. It detects harmful weight corruptions in proportion to behavioral impact, but out-of-distribution and adversarial inputs were largely not separable at a strict false-positive point. The ternary encoding is designed to match the corresponding unquantized range decision exactly.
- TERMon matches ternary trusted-behavior fingerprints during edge AI inference.
- PYNQ-Z2 implementation needs no BRAM or DSPs and decides in two cycles.
- Harmful weight corruption is detected in proportion to behavioral impact.
- Adversarial and out-of-distribution inputs were mostly not separable.
Full article151 words · extracted from arxiv.org · click to collapse
Edge AI accelerators are increasingly deployed in safety-critical environments, where model outputs may control physical actuators, make access-control decisions, or trigger alarms. In these settings, runtime failures often remain undetected because model corruption, distribution shift, and adversarial inputs can still produce well-formed, confident predictions. This paper presents TERMon, a lightweight hardware runtime monitor that detects such anomalies by observing inference behavior rather than re-executing or formally verifying the model. TERMon represents class-conditional trusted behavior as hardware-efficient ternary patterns that are matched in parallel against a thermometer-encoded fingerprint. The ternary encoding reproduces the corresponding unquantized range decision exactly. TERMon detects harmful weight corruptions in proportion to their behavioral impact, while out-of-distribution and adversarial inputs are largely not separable using the monitored features at a strict false-positive operating point. We implemented TERMon on a PYNQ-Z2 FPGA, and the pipelined design requires no on-chip block RAM or DSPs and has a two-cycle decision latency.
Text extracted automatically; images, tables and formatting may be missing. Original: https://arxiv.org/abs/2609.21713