Search: “hardware-security-verification”

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CertiFlash: A Formal Verification Framework for Flash Translation Layers in Computational Solid State Drives

CertiFlash provides machine-checked formal verification of SSD flash translation layers, proving isolation, integrity, and ownership invariants to prevent tenant data leaks.

CertiFlash is an open-source formal verification framework for Flash Translation Layers (FTL) in computational SSDs, mechanized in the Rocq proof assistant. It shows that a faulty FTL can corrupt device state at five surfaces (e.g., leaking data between tenants or dropping integrity tags), demonstrated on a DaisyPlus OpenSSD. Designers prove once that every operation of a general FTL model preserves a global invariant covering mapping, isolation, integrity, ownership, and allocation; new designs need only discharge five hypotheses. Across four case studies, added effort was 27-3,231 lines against a 16,489-line framework.

arXiv cs.CR·Sep 9, 15:44 UTC · 7d agoResearch1

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Scaling Verification of Cryptographic Software with Aeneas, Rust, and Lean

Microsoft SymCrypt implementations of SHA-3 and ML-KEM verified in Lean via Aeneas-extracted Rust models, with AI agents writing proofs.

The paper develops a methodology for verifying production Rust cryptographic code by using Aeneas to extract pure models into Lean, avoiding low-level pointer and aliasing reasoning. Applied to Microsoft's SymCrypt, it verifies SHA-3 and ML-KEM implementations ported from C to Rust and extends SymCrypt with FrodoKEM, ML-DSA, and HPKE. A 237 KLOC Lean development establishes safety, panic-freedom, and functional correctness of 16.7 KLOC of Rust supporting post-quantum cipher suites on x86-64 and ARM. AI agents autonomously write formal proofs verified by the Lean kernel, and evaluation shows verified Rust meets SymCrypt's performance and portability requirements.

arXiv cs.CR·Sep 14, 14:32 UTC · 2d agoResearch1

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Understanding the Security Boundary of Obfuscation-based On-Device LLM Protection

Researchers formalize obfuscation primitives for TEE-protected on-device LLMs and show a Collapse attack breaks ArrowCloak, TSQP, and LoRO, then extend the boundary.

The paper formalizes obfuscation primitives for TEE-Shielded LLM Partition (TSLP) schemes that offload computationally intensive layers from a Trusted Execution Environment to external GPUs. A novel primitive-guided attack, Collapse, demonstrates a shared vulnerability in prominent published methods including ArrowCloak (Security'25), TSQP (S&P'25), and LoRO (NeurIPS'25). The authors then introduce two new obfuscation primitives and integrate them with existing constructs to formulate an extended security boundary (O_ext).

arXiv cs.CR·Sep 9, 12:51 UTC · 7d agoAI safety & security

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Understanding the Usability of Cryptographic Verification Tools

Survey of Tamarin and ProVerif users reveals usability barriers: debugging non-termination, model validation, and opaque proof failures hinder cryptographic protocol verification.

The paper presents an exploratory human-centered survey of researchers, graduate students, and practitioners with hands-on experience using Tamarin, ProVerif, and related cryptographic protocol verification tools. Findings reveal usability barriers across the verification workflow, including difficulties debugging non-termination and performance issues plus the lack of systematic methods for validating formal models against real protocols. When proofs fail without concrete attacks, users commonly simplify models, add helper lemmas, and revisit modeling abstractions. Participants called for actionable diagnostics, clearer explanations of results, visualization, and automation for recurring proof tasks.

arXiv cs.CR·Sep 14, 20:40 UTC · 2d agoResearch

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Linux Foundation takes on TRACE, a hardware-backed runtime evidence specification for AI agents

The Linux Foundation adopts TRACE, an OPAQUE-contributed spec giving AI agents hardware-attested, cryptographically verifiable runtime and compliance evidence.

The Linux Foundation accepted the TRACE (Trust, Runtime Attestation and Compliance Evidence) specification contributed by OPAQUE, developed with AMD, Intel, Microsoft, and the Technology Innovation Institute. TRACE binds runtime environment, software, policies, data classifications, and tool usage into a portable, cryptographically verifiable artifact, composing existing standards such as RATS, EAT, SLSA, SCITT, SPIFFE, and EAR. It recorded nearly 135,000 PyPI downloads within 10 weeks of its June 2026 introduction, and its technical workstream will be hosted by the Coalition for Secure AI.

Help Net Security·Aug 26, 00:00 UTC · 22d agoAI tools & infra

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Hardware Fingerprinting FTQC via Quantum Decoder Timing

Quantum decoder timing on IBM Heron processors forms a side channel enabling device fingerprinting with 89% accuracy and workload inference.

The work demonstrates that wall-clock syndrome-decoding times on fault-tolerant quantum computers constitute a novel hardware side channel. Using per-shot decoder timings from three IBM Heron processors collected over 68 days, a passive observer can reconstruct detector-firing distributions, estimate logical error rate, infer code distance, and fingerprint the specific device with up to 89% accuracy versus 33% for random guessing. Noisy simulation based on Google's 105-qubit Willow processor distinguishes nine surface-code patches at 81% accuracy, showing the channel persists across vendors and code families.

arXiv cs.CR·Sep 10, 19:24 UTC · 6d agoResearch

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Access Control as Verified Parse Constraints

Researchers verify a class of EverParse validators that correctly enforce access-control policies, deploying a machine-checked enforcement gate on seL4.

The paper targets enforcement-code bugs in commercial security gateways by proving that forward-only, backtrack-free EverParse validators are verified recognizers for a bounded finite-state class that includes access-control decision functions with fixed-offset fields and bounded disjunction. Encoding a bounded policy language into a fixed-size byte buffer allows an SMT solver to verify the enforcement code once, covering all byte values, policies, requests, and sessions. Editing rule content over a fixed endpoint set requires no new proof, while adding endpoints reruns the toolchain. A deployment on the seL4 microkernel ensures every request passes through the gate and unverified components cannot corrupt the enforcement chain.

arXiv cs.CR·Sep 11, 06:33 UTC · 5d agoResearch1

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TPMSpy: Validation of Measured Boot Systems by Low-Level Tracing of TPM Usage

Researchers present TPMSpy, a platform-agnostic method validating TPM Measured Boot via low-level tracing, finding inconsistent Linux systemd measurements that break remote attestation and LUKS decryption.

An arXiv paper (2609.05011) introduces TPMSpy, a method that analyzes virtualized system–TPM interactions to independently reconstruct and validate TPM Event Logs without relying on the quoting mechanism, applicable to open and closed systems and demonstrated on Linux and Windows. A longitudinal analysis of Linux systems running systemd versions 245–258 (2020–2025) found wide divergence in Measured Boot usage, undocumented behavioral changes, and no common usage pattern. The authors report inconsistent measurement of user-space systemd services, which prevents reliable remote attestation and LUKS disk decryption on affected systems.

arXiv cs.CR·Sep 4, 11:23 UTC · 12d agoResearch

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AutoTrans: AI-Assisted Automatic Translation of Security Assertions for RISC-V Processors

AutoTrans uses LLMs with regex extraction and formal verification to automatically translate security assertions across RISC-V processors, achieving 78% unattended acceptance.

AutoTrans is an automated framework for translating verified security assertions between RISC-V processor targets, where manual translation takes hours per assertion. It combines a regex-based SystemVerilog signal extractor to prevent LLM signal hallucination, a pinned prompt template yielding byte-identical prompts resilient to model updates, and JasperGold FPV formal verification of generated assertions. Applied with DeepSeek V4 to translate assertions between RISC-V targets such as IBEX and NS31A, it achieves a 78% automatic translation acceptance rate without human intervention and 100% after human refinement.

arXiv cs.CR·Sep 9, 11:31 UTC · 7d agoResearch

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[hardware] Fullhan FH8626V100 - Multiple Vulnerabilities

Multiple vulnerabilities in the Fullhan FH8626V100 hardware chip have been disclosed alongside public proof-of-concept exploits.

Exploit-DB lists an entry covering multiple vulnerabilities in the Fullhan FH8626V100, a hardware component. The listing provides no CVE ids, vulnerability classes, or evidence of in-the-wild exploitation. Impact is likely limited to devices embedding the affected chip.

Exploit-DB·Sep 2, 00:00 UTC · 15d agoExploit / PoC

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SCHERI: Provably Secure Speculation Under the Constant-Time Policy for CHERI (Extended Version)

Researchers formally prove existing CHERI speculation proposals leak secrets and present SCHERI, a processor design with end-to-end Spectre-resistant constant-time guarantees.

The paper builds a formal framework reasoning jointly about capability safety, speculative execution, and information-flow security on CHERI architectures. It demonstrates that existing secure-speculation proposals fail to preserve constant-time confidentiality guarantees and can transiently leak isolated secrets. The authors present SCHERI, a new processor design formally proven to provide end-to-end secure speculation for the constant-time policy, resilient to Spectre attacks.

arXiv cs.CR·Sep 15, 16:33 UTC · 1d agoResearch

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Self-Verifying Anomaly Detection using Explainable AI for Cybersecurity of DER Networks

ExCYDER framework self-verifies anomaly detection alerts for DER power grids using LightGBM and SHAP, reaching over 98% detection accuracy.

The paper presents ExCYDER, an explainable AI anomaly detection framework for Distributed Energy Resource networks that combines LightGBM with SHAP to validate whether each model decision aligns with its feature-attribution evidence. On a realistic DNP3 dataset it achieved over 98% detection accuracy, 14.5 ms SHAP latency per alert, and confidence deviation within 5%. The self-verifying mechanism distinguishes coherent from inconsistent alerts, improving interpretability and auditability for DER-focused security operations centers.

arXiv cs.CR·Sep 11, 00:19 UTC · 6d agoResearch

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Sound Debloating of Redundant Checks in Zero-Knowledge Machine-Learning Circuits

Automated framework soundly removes up to 48.7% of redundant constraints in ezkl and zkml ZK-ML circuits, cutting prover time by up to 72.8%.

The framework uses whole-circuit abstract interpretation and a provenance graph to verify that each removed redundant check (range proofs, sign lookups, bit decompositions) remains entailed by the rest of the circuit, provably preserving soundness. It was evaluated on MLP, CNN, RNN, and transformer circuits generated by ezkl and zkml, with up to 25.3 million constraints. It removes up to 48.7% of constraints and reduces prover time by up to 72.8% without weakening security. Under-constrained circuits in deployed ZK systems have previously enabled attackers to forge transactions and bypass verification.

arXiv cs.CR·Sep 9, 13:27 UTC · 7d agoResearch1

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FreqSpaNet: Frequency and Spatial Learning of SFPF for Physical Layer Hardware Integrity Detection

FreqSpaNet learns spatio-frequency polarization fingerprints to detect unauthorized wireless hardware replacement, reaching 96.31% mean AUROC across seven replacement scenarios.

FreqSpaNet is a representation learning network for open-set hardware anomaly detection using spatio-frequency polarization fingerprints (SFPFs), which capture device-dependent responses across frequencies and directions. A frequency branch models local variations among neighboring frequencies while a geometry-aware spatial branch models directional relationships via angular information, combined through adaptive fusion and complementary pretraining. It achieves a mean AUROC of 96.31%, 9.05 points above the baseline, and is verified under seven hardware replacement scenarios.

arXiv cs.AI / cs.LG / cs.CL·Sep 15, 17:32 UTC · 1d agoAI research1

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SpliTEE: Improving LLM Inference on Trusted Hardware with Differentially Private GPU Outsourcing

SpliTEE splits LLM inference between Intel TDX trusted execution and untrusted GPUs, using differential privacy instead of encryption to protect intermediate representations.

SpliTEE extends split inference to LLMs, running inference partly inside an Intel TDX TEE while masking intermediate inputs sent to untrusted GPUs with differential privacy rather than encryption. The authors show a prompt-reconstruction attack recovers nearly 80% of prompts from unmasked intermediate representations, motivating the masking. A global sensitivity analysis bounds the required DP noise scale, avoiding quantization and keeping models in floating point. The implementation is nearly twice as fast as full CPU-based TDX inference and 5-15 seconds faster than encryption-based Slalom with higher accuracy, evaluated on Llama-3.2-3B and Qwen3-4B.

arXiv cs.CR·Sep 14, 04:55 UTC · 2d agoResearch

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OPEN-1B: A Fully Auditable Training Run

Open-1B releases a 1B-parameter model with bitwise-reproducible training, letting independent auditors verify every step of the run on commodity hardware.

The paper introduces a 'fully auditable' tier of model transparency: every training operation is reproducible with bitwise certainty on heterogeneous commodity hardware by imposing definite ordering on GPU kernel reductions, data batch ordering, and collective communication. Because replaying a full run on one machine is infeasible, a collective verification scheme lets many independent auditors certify individual steps covering the whole run. The authors release Open-1B with its full pretraining dataset, every intermediate checkpoint, the training codebase, and an audit harness. This rules out undisclosed data, injected biases, or backdoors that proof-of-learning or proof-of-training-data techniques cannot exclude.

arXiv cs.AI / cs.LG / cs.CL·Sep 15, 16:23 UTC · 1d agoAI research

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"They don't care about this": A Systematic Study of TEE Build Reproducibility in the Wild

91% of 115 surveyed TEE deployments across Intel SGX, TDX, and AMD SEV fail to provide reproducible builds needed for verifiable remote attestation.

A systematic study of 115 TEE deployments found 91% were not reproducible and 80% lacked both source code and a reference build, undermining remote attestation guarantees. Interviews with 12 developers of 50 Intel SGX projects confirmed that only one participant treats reproducibility as a development priority. The authors identify technical barriers such as embedded timestamps plus ecosystem-level issues like lack of build-environment control in multi-stakeholder projects, and call for holistic, committed reproducibility practices.

arXiv cs.CR·Sep 10, 11:43 UTC · 6d agoResearch

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From Specs to Apps: Verifying and Monitoring Models of Signal and WhatsApp

Researchers use the SpecMon runtime monitor to verify WhatsApp Web and Signal Desktop against formal Signal protocol models, finding undocumented libsignal fork differences.

The paper applies SpecMon, a runtime monitoring tool, to check whether executions of WhatsApp Web and Signal Desktop conform to formal models of the Signal protocol. The authors instrument both applications and build Tamarin-compatible multiset-rewrite models, including the first model of WhatsApp Web's implementation and the most detailed model to date of Signal's original protocol. They verify authentication and secrecy properties for core Signal protocol components, show monitoring detects deliberately injected faults with low overhead, and identify previously undocumented behavioral differences between the original libsignal library and WhatsApp's fork.

arXiv cs.CR·Sep 10, 17:48 UTC · 6d agoResearch

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Trusting-Trust Attack against an Entire Linux Distribution (via the strip utility)

ArXiv paper shows the trusting-trust compiler backdoor technique can compromise an entire Linux distribution via the strip utility.

The paper (arXiv 2607.24888) demonstrates that Ken Thompson's trusting-trust attack, long viewed as a compiler-specific threat, can backdoor an entire Linux distribution by targeting the strip utility. A compromised tool reproduces its backdoor in subsequent rebuilds of itself, generalizing the attack surface beyond compilers. The finding has supply-chain implications for build reproducibility and distribution trust, though it is a research result with no observed real-world exploitation.

Lobsters · security·Sep 5, 10:58 UTC · 11d agoResearch

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New Guidance Helps Businesses Verify Quantum-Safe Hardware Claims

TCG issued guidance to help businesses verify that trusted platform modules genuinely meet quantum-safe requirements.

The Trusted Computing Group (TCG) published new guidance aimed at proving that trusted platform modules (TPMs) genuinely satisfy essential quantum-safe requirements. The document gives businesses a way to validate vendor claims about post-quantum readiness in hardware security rather than trusting marketing assertions. This is a guidance publication, not an incident or vulnerability disclosure.

Infosecurity Magazine·Aug 24, 16:00 UTC · 23d agoAdvisory

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Towards Tackling Application Logic Flaws through Autonomous Formal-Logic Modeling and Automated Reasoning

LL-Verifier combines LLMs with logic model checking to automatically discover logic flaws, uncovering vulnerabilities in 27 IoT access-control protocols.

Researchers present LL-Verifier, a framework that uses LLMs to autonomously convert natural-language protocol descriptions and security goals into formal logic models in a new logic language built on Maude, then applies logic model checking for exhaustive verification. The framework targets application-logic flaws that are tied to business semantics and hard to scale with manual analysis. Evaluation on 27 access-control protocols of widely used IoT devices uncovered a range of sophisticated logic vulnerabilities with security and privacy implications.

arXiv cs.CR·Sep 9, 17:58 UTC · 7d agoResearch1

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Signal's new security feature checks if your encrypted chats were tampered with

Signal adds automatic key verification, a key-transparency system audited by Cloudflare and Trail of Bits that detects key-directory tampering in E2EE chats.

Signal launched automatic key verification, a key-transparency system that confirms a phone number or username remains bound to a consistent encryption key across Signal's key directory. Cloudflare and Trail of Bits independently audit the system, with cryptographic protection preventing auditors from seeing users' identifiers in plaintext. The feature mitigates key substitution by a compromised directory or privileged insider, though it currently requires the contact's phone number and users can fall back to manual Safety Number verification.

Help Net Security·Aug 12, 00:00 UTC · Aug 12, 2026Tools

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Your Critical Vulnerabilities Might Not Be Your Biggest Risk

Autonomous penetration testing advocates prioritize exploitable attack paths over raw vulnerability severity for continuous security validation.

The article argues that scanner severity scores lack context: a critical flaw behind strong segmentation may be low priority, while a medium flaw on internet-facing systems can provide a foothold chained toward sensitive data. It positions autonomous penetration testing and attack path validation as the execution layer for continuous security validation, replacing point-in-time assessments. The piece is vendor-authored thought leadership rather than incident or vulnerability news.

The Hacker News·Sep 11, 11:30 UTC · 5d agoIndustry1

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You Shall Not Pass into Ring-0! A User Privacy-Friendly Anti-Cheat Architecture for Personal Computers

Tirith replaces invasive kernel-level game anti-cheats with protected VMs and a dual-trusted virtualization monitor, preserving detection and near-native performance.

Researchers present Tirith, an anti-cheat architecture that runs video games in Protected Virtual Machines, sandboxing computations from untrusted root admins, and uses a virtualization monitor trusted by both players and developers to watch for malicious drivers. This removes the need for privacy-invasive ring-0 kernel anti-cheat components while matching their protection against a wide range of cheating mechanisms. To overcome VM stack limitations, the work contributes a security-focused Library OS kernel for games and an efficient graphics sharing pipeline for near-native rendering performance.

arXiv cs.CR·Sep 15, 17:56 UTC · 1d agoResearch

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How CHERIoT Provides Strong and Usable Isolation Without an MMU

ACM Queue paper explains how CHERIoT uses CHERI hardware capabilities to give microcontroller-class IoT devices memory and privilege isolation without an MMU.

The ACM Queue article (DOI 10.1145/3831361) describes CHERIoT, a RISC-V-derived platform that scales CHERI capability-based hardware down to small embedded and IoT microcontrollers. It provides strong, fine-grained isolation and memory safety without a memory management unit, aiming to make compartmentalization practical for low-cost devices. The piece emphasizes usability of the isolation model alongside its security guarantees.

Lobsters · security·Sep 10, 14:59 UTC · 6d agoResearch

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SafePal latest crypto hardware wallet maker affected by breach, with nearly 40,000 impacted

SafePal confirmed nearly 40,000 customers' order data was stolen, the third hardware wallet maker breached in a month after Trezor and Coinkite.

SafePal confirmed a breach exposing names, emails, shipping addresses, phone numbers, and purchase details of customers who ordered between March 2, 2025 and April 11, 2026, caused by a flaw in an order-tracking plugin. The company stressed wallets, seed phrases, and private keys remain secure, and all impacted customers were notified by email. A hacker advertised the stolen data on a dark web forum, and SafePal warned of targeted phishing via fake support calls and refund offers. CertiK data cited in the report shows 52 wrench attacks worldwide in H1 2026 with $124 million in losses, up 33% year-over-year.

The Record·Aug 17, 16:59 UTC · Aug 17, 2026Data breach in the wild

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GAUGE: A Formal Framework for Measuring Cryptographic Security under Heterogeneous Adversary Cost Models

GAUGE frames cryptographic security as profiles over adversary cost models, certifying a ranking reversal between ML-KEM-512 and AES-128 from a 4–5% memory pricing shift.

GAUGE represents cryptographic security as a function over admissible adversary cost models (a security profile), proves profiles are piecewise-linear and concave, and establishes a rating trilemma when two profiles cross. A polynomial-time linear-programming procedure certifies whether the ranking of two schemes is robust, reverses under admissible models, or is genuinely incomparable. Applied to NIST post-quantum standards, the framework certifies a ML-KEM-512 versus AES-128 ranking reversal from a 4–5% shift in memory pricing and measures lattice-sieving cost drift of 9.79 bits per year over eight years. A hybrid X25519 + ML-KEM-768 handshake reduces combined-break probability twenty-fold at a 2.3 kilobyte cost.

arXiv cs.CR·Sep 15, 14:55 UTC · 1d agoResearch

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Linux Foundation Introduces TRACE Standard for AI Runtime Evidence

The Linux Foundation introduced TRACE, an open standard providing hardware-attested runtime and compliance evidence for AI agents.

The Linux Foundation announced TRACE, an open standard designed to generate hardware-attested runtime evidence for AI agents. The standard aims to give auditors and regulators verifiable proof of what AI agents actually executed. It targets compliance and assurance needs for organizations deploying autonomous AI systems.

Infosecurity Magazine·Aug 26, 09:10 UTC · 21d agoAI tools & infra1

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Fresh-Challenge VDF Attestations for Model-Relative Response Latency

Fresh-Challenge VDF Attestations bind verifiable delay functions to unpredictable public challenges, yielding succinct evidence of model-relative response latency.

The paper specifies FCLA, a protocol composition that binds a VDF to an unpredictable public challenge, a message, and independently auditable release/receipt records. Under explicit assumptions about VDF sequentiality and a calibrated bound on an adversary's sequential evaluation rate, an accepted transcript is inconsistent with post-challenge generation. A benchmark of the public reference implementation confirms the expected evaluation-versus-verification separation on one documented machine. The contribution is a protocol design analysis, not a new VDF construction.

arXiv cs.CR·Sep 11, 11:25 UTC · 5d agoResearch

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New hardware device can RAM into encrypted memory, expose your data

Researchers built a $200 DDR5 interposer that silently drops memory writes to break TDX, SGX, and SEV-SNP confidential VM integrity, requiring physical access.

Researchers from KU Leuven, ETH Zurich, Durham University, and Google demonstrated DDRop, a hardware interposer costing under $200 that corrupts DDR5 bus commands to silently drop writes to encrypted memory, enabling replay attacks on confidential VMs. Because scalable memory encryption lacks freshness checks, protected VMs keep computing on stale attacker-selected data; on an Intel TDX server the attack forces debug mode for plaintext memory reads or forges attestation reports, succeeding in under two minutes without crashing. Intel and AMD both called the attack out of scope for their cloud threat models, with no mitigation planned, and proposed cache line versioning appears still vulnerable. The full interposer design is being released as open-source hardware.

The Register · Security·Sep 14, 18:31 UTC · 2d agoResearch

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