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How CHERIoT Provides Strong and Usable Isolation Without an MMU

ACM Queue paper explains how CHERIoT uses CHERI hardware capabilities to give microcontroller-class IoT devices memory and privilege isolation without an MMU.

The ACM Queue article (DOI 10.1145/3831361) describes CHERIoT, a RISC-V-derived platform that scales CHERI capability-based hardware down to small embedded and IoT microcontrollers. It provides strong, fine-grained isolation and memory safety without a memory management unit, aiming to make compartmentalization practical for low-cost devices. The piece emphasizes usability of the isolation model alongside its security guarantees.

Lobsters · security·Sep 10, 14:59 UTC · 6d agoResearch

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Analog Pin Directionality as an Exfiltration Attack Surface in Mixed-Signal ICs

Researchers demonstrate exfiltration through nominally input-only analog pins in mixed-signal ICs, recovering data at 10 kbps on a 55nm PPG front-end.

The paper identifies a directionality-based attack class in analog/mixed-signal (AMS) ICs where data-dependent circuit-offset modulation converts a nominally input-only pin into an outbound information channel. Three host conditions enable the attack: a closed-loop amplifier, an exposed amplifier input, and sufficiently high impedance at that pin. Silicon validation on a photoplethysmography analog front-end in 55nm CMOS showed exfiltration at up to 10 kbps with error-free PRBS recovery, under 0.001% area overhead, and only 0.03 dB SNR reduction.

arXiv cs.CR·Sep 16, 17:39 UTC · 17h agoResearch

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Security fixes in libfuse-3.18.3

libfuse 3.18.3 disables fuse_session_custom_io() by default to stop non-kernel peers from forging FUSE requests libfuse parses unvalidated.

libfuse 3.18.3 ships security fixes announced by Sam James on the oss-security mailing list. The fuse_session_custom_io() function is now disabled unless libfuse is built with -Denable-custom-io=true, returning -ENOTSUP otherwise. The reason is that a custom io peer might not be a kernel and can forge requests that libfuse parses without validation. The hello_ll_uds example is now built only with that option, and enabling it triggers a warning at configure time.

oss-security·Sep 9, 01:33 UTC · 8d agoVulnerability

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How XPUs Meet a World-Class AI Factory

NVIDIA argues AI factories with custom XPUs and NVLink Fusion connectivity must optimize tokens-per-second, tokens-per-watt, cost and uptime.

NVIDIA published a blog explaining that AI factories running continuously are economically defined by delivered output: tokens per second, tokens per watt, cost per token, utilization and uptime. It argues hyperscalers and AI-native companies building custom XPUs need infrastructure designed as a complete factory rather than collections of individual accelerators. The piece promotes NVIDIA's NVLink Fusion and full-stack XPU connectivity as the foundation for such world-class AI factory builds.

NVIDIA Blog·Aug 24, 15:00 UTC · 23d agoAI industry

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Speculative Decoding in vLLM on AMD GPUs

vLLM benchmarks speculative decoding on AMD Instinct MI300X and MI355X GPUs across five drafting methods including EAGLE-3 and native MTP.

The vLLM project documents draft-and-verify speculative decoding support for AMD GPUs via ROCm, comparing native MTP, Gemma 4 MTP, EAGLE-3, DFlash, and DSpark drafting approaches. Output-token throughput effects varied with drafting method, proposal length, model family, draft checkpoint, workload, and acceptance behavior. The post also covers how to enable each method plus practical tuning and observability considerations.

Hacker News · AI·Sep 7, 09:26 UTC · 10d agoAI tools & infraHN 141↑ · 52 comments1

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CertiFlash: A Formal Verification Framework for Flash Translation Layers in Computational Solid State Drives

CertiFlash provides machine-checked formal verification of SSD flash translation layers, proving isolation, integrity, and ownership invariants to prevent tenant data leaks.

CertiFlash is an open-source formal verification framework for Flash Translation Layers (FTL) in computational SSDs, mechanized in the Rocq proof assistant. It shows that a faulty FTL can corrupt device state at five surfaces (e.g., leaking data between tenants or dropping integrity tags), demonstrated on a DaisyPlus OpenSSD. Designers prove once that every operation of a general FTL model preserves a global invariant covering mapping, isolation, integrity, ownership, and allocation; new designs need only discharge five hypotheses. Across four case studies, added effort was 27-3,231 lines against a 16,489-line framework.

arXiv cs.CR·Sep 9, 15:44 UTC · 7d agoResearch1

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Microsoft’s Project Zenith is a ‘distraction-free Windows experience’ for developers

Microsoft branded its developer-optimized Windows setup Project Zenith, with 64GB+ memory devices from AMD that run 30B+ parameter AI models locally.

Microsoft named its developer-focused Windows configuration Project Zenith, targeting new hardware with 64GB or more of unified memory. AMD unveiled the first Project Zenith device at IFA, a miniature PC powered by Ryzen AI Halo chips, with more devices expected in the coming months. The setup ships with a preconfigured Windows install and preinstalled developer tools including Visual Studio Code, GitHub Copilot, PowerToys, WinAppCLI, and Windows Dev Skills. Microsoft says it lets developers run 30B+ parameter models locally and unmetered, reducing reliance on metered cloud tokens.

The Verge · AI·Sep 4, 10:44 UTC · 13d agoAI industry1

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No Bit Left Behind: Using Brute-Force Lifting to Achieve Fully Static Binary Recompilation

Prototype binary lifter brute-force lifts every byte offset of x86-64 binaries to LLVM IR, enabling fully static cross-ISA recompilation without runtime support.

The paper presents a fully static, whole-program binary lifting system that treats every byte offset as a potential branch target, constructing a superset control flow graph that conservatively contains all feasible control flows. Statically unresolvable computed branches are reduced to lookups in a dispatch table pointing to translated control flow paths, eliminating runtime translation machinery on the target machine. A prototype recompiles x86-64 binaries to LLVM IR with no code/data heuristics and achieves fully static cross-compilation to AArch64 using unmodified LLVM backends.

arXiv cs.CR·Sep 14, 23:00 UTC · 2d agoResearch1

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A new open standard locks AI weights to approved hardware

OPAQUE releases Weight Custody Manifest, an open standard keeping AI model weights encrypted until receiving hardware cryptographically attests to builder-specified conditions.

OPAQUE, a confidential computing company, released the Weight Custody Manifest (WCM) standard as a developer-preview specification with a Python SDK and a public test suite of 91 cases. WCM keeps model weights encrypted until the receiving infrastructure proves via CPU/GPU attestation that it matches builder-signed conditions, and decryption access can be revoked later if conditions change. OPAQUE says it ran the attestation exchange on an NVIDIA H100 and on AMD and Intel confidential servers hosted on Azure and Google Cloud, with two independent SDK builds producing identical output across 5,948 files. The public quickstart only exercises protocol logic on synthetic evidence and skips GPU cryptographic verification, and the standard cannot distinguish an authorized key from one physically extracted from hardware.

Help Net Security·Sep 10, 04:10 UTC · 7d agoAI safety & security

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[AINews] Hot Chips: OpenAI’s Jalapeño, Cerebras CS-5, Groq 3 LPX, Apple M6

OpenAI unveiled Jalapeno custom inference chip claiming 1.5-1.9x better perf-per-watt than NVIDIA GB200/GB300, deploying in-house by year-end.

At the 37th Hot Chips conference, OpenAI published first benchmark details for its custom Jalapeno inference chip, claiming 1.5-1.9x more work per watt, 1.7-3.6x lower end-to-end latency, and 2.1-4.1x higher interactive-workload performance versus NVIDIA GB200/GB300, with the 700W-rated part staying at or below 550W in tests. Deployment into OpenAI's own infrastructure begins by year-end, with Gen 2 deep in development and Gen 3 underway. OpenAI also said GPT-Astra and Codex helped write low-level kernels, reportedly 1.5-1.8x faster than human-expert code for selected attention and MoE blocks. Cerebras CS-5, Groq 3 LPX and Apple M6 were also featured at the conference.

Latent Space·Aug 27, 01:31 UTC · 21d agoAI industry

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Granite 4.2 LLMs: How They're Built

IBM releases Granite 4.2 LLMs with a Hugging Face post detailing how the model family was built.

Hugging Face published an IBM Granite team post titled 'Granite 4.2 LLMs: How They're Built' covering the Granite 4.2 model family. The article addresses how the models were constructed, i.e., their build and training methodology. Full article text was unavailable, so model sizes, benchmarks, and licensing details could not be extracted.

Hugging Face Blog·Aug 25, 15:14 UTC · 22d agoModel release

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Understanding the Security Boundary of Obfuscation-based On-Device LLM Protection

Researchers formalize obfuscation primitives for TEE-protected on-device LLMs and show a Collapse attack breaks ArrowCloak, TSQP, and LoRO, then extend the boundary.

The paper formalizes obfuscation primitives for TEE-Shielded LLM Partition (TSLP) schemes that offload computationally intensive layers from a Trusted Execution Environment to external GPUs. A novel primitive-guided attack, Collapse, demonstrates a shared vulnerability in prominent published methods including ArrowCloak (Security'25), TSQP (S&P'25), and LoRO (NeurIPS'25). The authors then introduce two new obfuscation primitives and integrate them with existing constructs to formulate an extended security boundary (O_ext).

arXiv cs.CR·Sep 9, 12:51 UTC · 7d agoAI safety & security

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MicroHasTEE: Bare-Metal Haskell for Type-Level Peripheral Ownership on Armv8-M

MicroHasTEE expresses TrustZone secure and non-secure firmware as one typed Haskell program, catching peripheral-ownership inconsistencies at compile time.

MicroHasTEE is a multiparty Haskell framework that models both TrustZone firmware images as participants in a single typed program, using type-level capability ledgers to track peripheral acquisition, configuration, transfer, and finalization. MicroHs compiles the shared program twice to produce separate bare-metal Secure and Non-secure firmware images. The framework rejects inconsistent resource use, post-configuration attribution changes, wrong-domain callbacks, and calls to unregistered Secure services. A door-lock case study on an STM32U5 Nucleo board produced images of 232.7 KiB and 228.4 KiB of flash with roughly 220 KiB of SRAM per domain.

arXiv cs.CR·Sep 11, 08:34 UTC · 6d agoResearch1

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LLM-Driven Algorithm Design for Quantum Circuit Synthesis based on Binary Decision Diagrams

QuantumEvo uses an LLM to evolve BDD variable-ordering heuristics, achieving a 70.9% tie-or-win rate on quantum circuit cost versus baseline methods.

The QuantumEvo framework uses an LLM as a heuristic generator for quantum-cost-aware BDD variable ordering in reversible circuit synthesis, searching over heuristics initialized from multiple families and selecting them by downstream quantum circuit cost. The discovered heuristic HGA-QE modifies the sifting step inside a genetic algorithm and achieves a 70.9% tie-or-win rate against the per-function best baseline, with strict wins on 13.5% of functions. Advantages are clearer on benchmark suites not used for heuristic discovery.

arXiv cs.AI / cs.LG / cs.CL·Sep 4, 16:25 UTC · 12d agoAI research1

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The Illusion of Local Privacy: Confidentiality Boundary Failures in Consumer LLM Serving Systems

Researchers show local LLM serving systems leak prompts via memory residue, plaintext persistence, a llama.cpp tenant-isolation flaw, and timing oracles.

A study of consumer local-LLM serving systems identifies four boundaries where prompt confidentiality fails: model loading, runtime memory, wrapper persistence, and the serving interface. Using the LLAnalyzer framework across four open-weight model families and two deployment platforms, the authors recover plaintext prompts from allocator-managed memory after inference and show wrappers extend prompt lifetime. They also uncover a previously undocumented llama.cpp authorization flaw letting one authenticated client restore another tenant's saved conversation state, succeeding in 200/200 trials, plus a remote timing oracle via shared prompt-prefix caching that works over WAN.

arXiv cs.CR·Sep 16, 11:53 UTC · 22h agoAI safety & security

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MaxKernel: Agentic Kernel Generation for TPUs

Researchers open-source MaxKernel, a multi-agent LLM system that generates and optimizes TPU kernels matching expert hand-tuned baselines on JaxBench.

MaxKernel is a multi-agent system offering three paradigms for TPU kernel development: human-in-the-loop collaborative design, a fully autonomous metric/trace-driven optimization loop, and graph-based autonomous search for global exploration. All paradigms draw on a shared pool of specialized sub-agents for planning, implementation, self-debugging, testing, and hardware profiling. Evaluated on JaxBench's 50 diverse TPU kernel tasks and real-world workloads from open-source models, it consistently matches expert hand-tuned baselines. The system is open-sourced via the AI-Hypercomputer GitHub repository.

Hugging Face daily papers·Sep 2, 20:00 UTC · 14d agoAI tools & infra1

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ASML locks in TSMC, Samsung, and Intel while Huawei races to break its grip

ASML secures TSMC, Samsung, and Intel commitments for twelve-inch photomasks while Huawei funds China's DUV lithography push to bypass export controls.

ASML, the world's only EUV lithography maker, has locked in commitments from TSMC, Samsung, and Intel to move photomasks from six-inch to twelve inches, which ASML CTO Marco Pieters says could raise High-NA throughput by 40 percent; TSMC and ASML plan a test line by 2031 with production on High-NA tools by 2033. Meanwhile Huawei is orchestrating China's push to build DUV lithography equipment and reduce dependence on ASML, centered on Shanghai equipment maker Yuliangsheng, with SMIC testing the machines and Huawei's Habo fund backing Zeiss rivals and light-source developers. Bernstein analysts note the main bottlenecks remain projection lenses and light sources.

The Decoder·Sep 8, 15:11 UTC · 8d agoAI industry

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Cisco Nexus 9000 Series Switches Silicon One Remote Code Execution Vulnerability

Cisco patches unauthenticated RCE in Nexus 9000 Silicon One switches exposed via TCP ports 43210 and 43211 in the default L3 VRF.

Cisco disclosed and patched a vulnerability in the Silicon One integration for Nexus 9000 Series switches that allows an unauthenticated remote attacker to execute code with root privileges. The flaw stems from TCP ports 43210 and 43211 being accessible in the default Layer 3 VRF. Exploitation can also crash the S1HAL process and force an affected device to reload. Cisco has released software updates, and workarounds are available to mitigate exposure.

Cisco Security Advisories·Sep 2, 16:00 UTC · 14d agoVulnerability

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Building a Linux GPU Driver for the M4 Mac Mini in One Month

Two developers built a fully OpenGL ES 3.0 compliant Linux GPU driver for the M4 Mac Mini in one month via clean-room reverse engineering.

Niklas and the author reverse engineered Apple's AGX GPU firmware ABI and user-space components in about a month, a process that normally takes years, producing an OpenGL ES 3.0 conformant driver fast enough to run Minecraft at 200fps on an M4 Mac Mini. The work was done transparently using hypervisor traces without examining Apple binaries, following clean-room practices, and included a custom shader compiler, command stream builder, and a full Linux kernel driver for the firmware ABI. The A18 Pro firmware ABI proved significantly more complex than the M1's, with 1.5x as many structs and twice as many pointers. All experiments and provenance evidence were published in public agx-re repositories.

Hacker News · AI·Sep 15, 19:30 UTC · 1d agoResearchHN 40↑ · 5 comments

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ZDI-26-570: Linux Kernel IGMP Subsystem Race Condition Local Privilege Escalation Vulnerability

ZDI publishes ZDI-26-570, a CVSS 7.5 race condition local privilege escalation in the Linux kernel's IGMP subsystem.

The Zero Day Initiative disclosed a race condition in the Linux kernel's IGMP subsystem that allows local attackers to escalate privileges. Exploitation requires the attacker to first execute high-privileged code on the target system. ZDI assigned a CVSS rating of 7.5 to this finding; no CVE id is stated in the advisory text.

ZDI Published Advisories·Aug 13, 05:00 UTC · Aug 13, 2026Advisory

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ZDI-26-681: Linux Kernel FUSE Subsystem Race Condition Local Privilege Escalation Vulnerability

ZDI discloses CVE-2026-64265, a CVSS 7.8 race condition in the Linux Kernel FUSE subsystem enabling local privilege escalation.

ZDI-26-681 covers a race condition in the Linux Kernel FUSE subsystem that allows local attackers to escalate privileges. Exploitation requires the ability to execute low-privileged code on the target system. ZDI assigned a CVSS rating of 7.8 and CVE-2026-64265.

ZDI Published Advisories·Sep 14, 05:00 UTC · 3d agoAdvisoryCVE-2026-64265

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Re: Linux kernel LPEs: ZcopyReaper (CVE-2026-43502) and 20 more

oss-security thread discusses newly disclosed Linux kernel local privilege escalations, including ZcopyReaper (CVE-2026-43502) and about 20 more flaws.

An oss-security mailing list thread discusses newly disclosed Linux kernel local privilege escalation (LPE) issues, headlined by ZcopyReaper (CVE-2026-43502) along with roughly 20 more. Discussants ask whether the many reports could be summarized and note that locking kernel module loading after boot has repeatedly proven an effective mitigation. The visible discussion does not state whether any of the flaws are exploited in the wild or give specific patch guidance beyond the individual reports.

oss-security·Sep 8, 17:02 UTC · 8d agoVulnerabilityCVE-2026-43502

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Decomposition-Guided Diffusion Language Models for Inertial Confinement Fusion Prediction

ICF-DLM, the first language-model-based inertial confinement fusion predictor, cuts peak-timing error from 11.6 to 9.2 steps versus LLaMA-3-8B.

Each National Ignition Facility shot costs roughly one million dollars, motivating accurate AI surrogates for predicting 512-step neutron-rate waveforms from laser pulses and target parameters. ICF-DLM combines physics-typed decomposition into yield, peak timing, and local waveform; bidirectional denoising that defers commitment to peak location; and a physics-driven PPO reward. On ICFBench (50,000 simulations plus 232 experimental shots) it outperforms a matched autoregressive LLaMA-3-8B, classical sequence models, and LLM-based time-series predictors.

arXiv cs.AI / cs.LG / cs.CL·Sep 7, 17:00 UTC · 9d agoAI research

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SCHERI: Provably Secure Speculation Under the Constant-Time Policy for CHERI (Extended Version)

Researchers formally prove existing CHERI speculation proposals leak secrets and present SCHERI, a processor design with end-to-end Spectre-resistant constant-time guarantees.

The paper builds a formal framework reasoning jointly about capability safety, speculative execution, and information-flow security on CHERI architectures. It demonstrates that existing secure-speculation proposals fail to preserve constant-time confidentiality guarantees and can transiently leak isolated secrets. The authors present SCHERI, a new processor design formally proven to provide end-to-end secure speculation for the constant-time policy, resilient to Spectre attacks.

arXiv cs.CR·Sep 15, 16:33 UTC · 1d agoResearch

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Jalapeño’s first results show industry-leading speed and efficiency in AI inference

OpenAI's Jalapeño custom inference chip shows faster, more power-efficient inference with higher throughput and lower latency.

OpenAI announced first results for Jalapeño, its custom AI inference chip. The company claims industry-leading speed and efficiency, delivering higher throughput and lower latency for modern models compared with existing options. The chip targets more power-efficient serving of large models at scale.

OpenAI News·Aug 25, 07:00 UTC · 23d agoAI industry

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New hardware device can RAM into encrypted memory, expose your data

Researchers built a $200 DDR5 interposer that silently drops memory writes to break TDX, SGX, and SEV-SNP confidential VM integrity, requiring physical access.

Researchers from KU Leuven, ETH Zurich, Durham University, and Google demonstrated DDRop, a hardware interposer costing under $200 that corrupts DDR5 bus commands to silently drop writes to encrypted memory, enabling replay attacks on confidential VMs. Because scalable memory encryption lacks freshness checks, protected VMs keep computing on stale attacker-selected data; on an Intel TDX server the attack forces debug mode for plaintext memory reads or forges attestation reports, succeeding in under two minutes without crashing. Intel and AMD both called the attack out of scope for their cloud threat models, with no mitigation planned, and proposed cache line versioning appears still vulnerable. The full interposer design is being released as open-source hardware.

The Register · Security·Sep 14, 18:31 UTC · 2d agoResearch

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SK Hynix reportedly in talks with Intel to build memory chips in US

SK Hynix is reportedly negotiating with Intel to manufacture memory chips in the US, possibly leasing space at Intel's Ohio fab.

Reuters reports SK Hynix and Intel have discussed SK Hynix producing RAM in the US for the first time, including leasing space at Intel's planned Ohio factory or forming a joint venture that could include cloud-service providers; SK Hynix says nothing is finalized. The company is already building a $3.8 billion AI chip packaging and research facility in West Lafayette, Indiana, with mass production expected to begin in 2029, amid surging HBM demand from AI data centers. The potential deal could face a South Korean government review over transfers of strategically important chip technology, and follows Intel's 2020 sale of its NAND flash business to SK Hynix for $9 billion.

TechCrunch · AI·Sep 16, 13:23 UTC · 21h agoAI industry

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Linux Foundation takes on TRACE, a hardware-backed runtime evidence specification for AI agents

The Linux Foundation adopts TRACE, an OPAQUE-contributed spec giving AI agents hardware-attested, cryptographically verifiable runtime and compliance evidence.

The Linux Foundation accepted the TRACE (Trust, Runtime Attestation and Compliance Evidence) specification contributed by OPAQUE, developed with AMD, Intel, Microsoft, and the Technology Innovation Institute. TRACE binds runtime environment, software, policies, data classifications, and tool usage into a portable, cryptographically verifiable artifact, composing existing standards such as RATS, EAT, SLSA, SCITT, SPIFFE, and EAR. It recorded nearly 135,000 PyPI downloads within 10 weeks of its June 2026 introduction, and its technical workstream will be hosted by the Coalition for Secure AI.

Help Net Security·Aug 26, 00:00 UTC · 22d agoAI tools & infra

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Nous Research Adds One-Click Local Model Setup to Hermes Desktop

Nous Research's Hermes Desktop now offers one-click local model setup that reads hardware, picks a fitting quantization, downloads weights, and configures llama.cpp automatically.

Hermes Desktop, the MIT-licensed build of the open-source Hermes Agent, now sets up local models in one click: it reads the machine's hardware, selects a model that fits, downloads weights, and configures the inference runtime. It manages a pinned llama.cpp build with CUDA, Metal, Vulkan, HIP, and CPU backends, and shows green/amber/red memory-fit verdicts per catalog model before download. Quantization floors at 4-bit, and recommended models guarantee at least a 64K context window protected by ordered RAM offload (expert weights first, never the attention cache). It runs on macOS 12+, Windows 10/11, and Linux with no account required for local models.

MarkTechPost·Sep 5, 19:12 UTC · 11d agoAI tools & infra1

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ZDI-26-568: Linux Kernel Net Scheduler Race Condition Local Privilege Escalation Vulnerability

ZDI disclosed a race condition (CVSS 7.5) in the Linux kernel net scheduler enabling local privilege escalation; no CVE assigned in the advisory text.

ZDI advisory ZDI-26-568 describes a race condition in the Linux kernel's net scheduler that allows local attackers to escalate privileges on affected installations. Exploitation requires the attacker to first execute high-privileged code on the target system. ZDI assigned a CVSS rating of 7.5; no CVE identifier is listed in the advisory text.

ZDI Published Advisories·Aug 13, 05:00 UTC · Aug 13, 2026Vulnerability

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