Anthropic says AI cut a Claude port to AMD GPUs to three days
Anthropic claims Mythos wrote nearly all AMD kernels and that it already runs Claude on four chip families.
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Stories tagged #cuda
Qwen3.5-2B Compiled into qwenGPU with 45 CUDA Layers
The small model now runs 45 layers natively on GPU using CUDA.
KernelSeek beats FlashAttention-3 by asking questions, not adding tools
A tool-rich agent stalled at 0.50x after 133 steps; KernelSeek reached 1.13x, then 1.16x and 1.46x on later kernels.
US antitrust regulators scrutinize Nvidia's Hugging Face deal
Sources say Justice Department officials are asking whether the $12.93 billion purchase could give Nvidia control of a key AI hub.
AWS releases TorchNeuron so PyTorch apps can run on Trainium
Amazon says one configuration line moves PyTorch apps to Trainium and it will upstream changes to loosen Nvidia ties in PyTorch.
DuoLM reuses compact item embeddings for faster LLM recommendations
The paper reports about 26,400 candidate scores per second on one H100, roughly 60 times a vLLM-served teacher.
All Systems Go: Global PC App Ecosystem Ready for NVIDIA RTX Spark
NVIDIA prepares RTX Spark PCs for an Oct. 16 launch with local AI agents and Nemotron 3.5 Bolt 74B.
From the creator of Redis; run LLM locally with ds4
Antirez's ds4 inference engine runs DeepSeek V4, GLM 5, and Qwen3.8 locally on high-memory Mac, CUDA, and ROCm machines.
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Productive, Durable, Fungible: How NVIDIA AI Factories Maximize Return on Investment
NVIDIA argues AI factories maximize ROI through higher tokens per megawatt, longer GPU life, and workload fungibility.
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China's AI industry closes ranks as Deepseek ships open-source software for Huawei's Ascend chips
DeepSeek open-sourced TileLang and chip libraries for Huawei's Ascend AI processors.
KernelZero: Co-Evolving Proposer and Coder for Continuously Improved GPU Kernel Generation
KernelZero-7B beats Claude-4.5-Sonnet and DeepSeek-V4-Pro on CUDA and Triton kernel generation.
Show HN: Agentic CUDA Kernel Optimizer
Hacker News highlights a Show HN project for an agentic CUDA kernel optimizer.
Batched Paillier-Based Hamming-Distance Computation over Binary Embeddings
A batched GPU Paillier client computes Hamming distance on encrypted 512-bit embeddings at high throughput.
Bend – A language that blocks AI mistakes via proof and runs on GPUs
Bend is a new programming language combining C-speed compilation, GPU parallelism, and Lean-style proofs that stop AI agents from merging code violating declared laws.
Inside NVIDIA’s cuDNN Graph API: Fusion, Autotuning, and Plan Reuse with cuDNN Frontend
MarkTechPost tutorial walks through NVIDIA's cuDNN Frontend graph API, covering kernel fusion, autotuning, plan reuse, and CUDA graph capture on Colab GPUs.
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CUDA for AMD on Windows
GitHub project 'CUDA for AMD on Windows' trends on Hacker News, aiming to run CUDA workloads on AMD GPUs under Windows.
VU#369611: ExLlamaV3 contains Denial of Service vulnerability via insufficient bounds checking on kernel dispatch index
CERT/CC details CVE-2026-84286, an out-of-bounds memory access in ExLlamaV3's CUDA extension causing denial-of-service crashes; fixed via merged pull request.
GPU-CFR: 80x Faster Counterfactual Regret Minimization by Compiling the Game to Static Dataflow and CUDA Graph Replay
GPU-CFR compiles counterfactual regret minimization into static dataflow with CUDA Graph Replay, achieving 29.8-80.4x speedups over prior GPU solvers.
NVIDIA Announces CUDA Rust with cuda-oxide (SIMT) and cutile-rs (Tile) for Compile-Time-Safe GPU Kernels
NVIDIA launches CUDA Rust via open-source cuda-oxide (SIMT) and cutile-rs (Tile), bringing compile-time-safe Rust GPU kernels.
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Towards Standardized Evaluation of GPU Memory Safety with GMSBench
GMSBench provides 149 CUDA tests covering spatial, temporal, and concurrency GPU memory errors, exposing detection gaps in Compute Sanitizer.
Perplexity Details Its GPU Embedding Stack: How Ivy, Tulip and ROSE Serve pplx-embed
Perplexity details its GPU embedding serving stack (Ivy, Tulip, ROSE), which reuses LLM prefill/decode kernels, CUDA graphs, and LazyTensors to cut launch overhead.
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