Back to the Future: Rethinking EDA Infrastructure for Agentic Systems in Chip Design Verification
BTTF uses multi-agent SQL over simulation dumps to automate chip-design verification queries.
The paper says roughly 74.6% of LLM-for-EDA studies target static RTL code generation, leaving post-simulation verification and waveform debugging largely unaddressed. Back-to-the-Future (BTTF) converts unstructured simulation dumps into a normalized SQLite database and uses collaborative agents to translate natural-language verification queries into schema-aware SQL, correlating signal anomalies with versioned RTL. On a 150-query benchmark it reports 95.33% execution accuracy.
- About 74.6% of prior LLM-EDA studies target static RTL generation.
- BTTF normalizes simulation dumps into a relational SQLite database.
- Agents turn verification questions into SQL linked to versioned RTL.
- Reports 95.33% execution accuracy on a 150-query benchmark.
Full article125 words · extracted from arxiv.org · click to collapse
The unprecedented computational scale of modern artificial intelligence depends on complex, multi-billion-transistor Systems-on-Chip, yet the workflows that verify these chips remain stubbornly manual. Although Large Language Models (LLMs) have made rapid inroads into Electronic Design Automation (EDA), approximately 74.6% of existing studies target static Register-Transfer Level (RTL) code generation, leaving post-simulation verification and interactive waveform debugging largely untouched. We introduce Back-to-the-Future (BTTF), an end-to-end agentic framework that closes this infrastructural gap. BTTF distills massive, unstructured simulation dumps into a normalized relational SQLite database and couples it with a collaborative multi-agent orchestration engine that translates natural-language verification queries into schema-aware SQL while correlating signal anomalies with versioned RTL repositories. Across a 150-query benchmark, BTTF attains 95.33% execution accuracy, charting a practical path toward autonomous EDA verification.
Text extracted automatically; images, tables and formatting may be missing. Original: https://arxiv.org/abs/2610.06790