arXiv cs.AI / cs.LG / cs.CL·4d agoEquivSVA: A Formally Verified Dataset of Behavioral Assertions Across Equivalent RTL Implementations#systemverilog#formal-verification#rtlAI research1
arXiv cs.CR·17d agoAutoTrans: AI-Assisted Automatic Translation of Security Assertions for RISC-V Processors#formal-verification#hardware-security-verification#llmResearch1