The Achilles' Heel of Partial Reconfiguration: Optical Side-Channel Leakage on the 7-Series ICAP
Researchers recover plaintext FPGA configuration from AMD 7-Series ICAP using optical probing during partial reconfiguration.
Researchers implement a proof of concept of an AMD-proposed asymmetric encryption scheme for 7-Series FPGA bitstreams, using partial reconfiguration from programmable logic, and assess its security and hardware overhead. They then demonstrate an optical side channel: photon emission microscopy locates the ICAP buses on an XC7A200T, and electro-optical probing extracts plaintext configuration data during dynamic reconfiguration. They argue that custom cryptographic engines remain exposed because reconfiguration must pass through hard-wired configuration interfaces.
- Proof of concept implements proposed asymmetric bitstream encryption on 7-Series FPGAs.
- Photon emission microscopy locates ICAP buses on an XC7A200T device.
- Electro-optical probing extracts plaintext configuration during partial reconfiguration.
- Hard-wired configuration interfaces stay exposed despite custom cryptographic engines.
- Vendors
- AMD
- Products
- 7-Series FPGAXC7A200TICAP
From the original article
1 min read at arxiv.orgMajor FPGA manufacturers have incorporated bitstream encryption to protect sensitive configuration data. However, for the most widely used FPGA families, multiple attacks against unpatchable protection schemes hard-wired into the devices can bypass or fully break them, making patchable schemes desirable.
By Antonio Saavedra · arxiv.org
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