Automotive Hardware Attacks: An Architect's Guide to TARA
ISO/SAE 21434 TARA underrates physical hardware attacks; authors add a hardware-aware feasibility method.
The paper argues ISO/SAE 21434 threat analysis and risk assessment treats implementation-level hardware attacks inconsistently: two of three exemplified feasibility methods rate every physical-access path very low by construction, while the third can assign any of four ratings. The authors add a hardware-aware TARA covering side-channel analysis, fault injection, and debug or test-interface abuse, with a lifecycle attacker model, path dominance, and an H0-H2 relevance gate. On a reference gateway and ten published automotive attacks, seven used a debug, programming, boot, diagnostic, or update mechanism, and only four attacked a cryptographic computation.
- Two ISO/SAE 21434 methods rate every physical path very low.
- Extension covers side channels, fault injection, and debug abuse.
- H0-H2 gate decides when hardware resistance must be demonstrated.
- Seven of ten studied attacks used debug or update mechanisms.
From the original article
1 min read at arxiv.orgThreat analysis and risk assessment (TARA) according to ISO/SAE 21434 treats implementation-level hardware attacks inconsistently.
By Jakub Breier · arxiv.org
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